int index;
int ofs;
int seg;
+ TCGAtomAlign aa;
} HostAddress;
bool tcg_target_has_memory_bswap(MemOp memop)
{
TCGLabelQemuLdst *ldst = NULL;
MemOp opc = get_memop(oi);
- unsigned a_bits = get_alignment_bits(opc);
- unsigned a_mask = (1 << a_bits) - 1;
+ unsigned a_mask;
+
+#ifdef CONFIG_SOFTMMU
+ h->index = TCG_REG_L0;
+ h->ofs = 0;
+ h->seg = 0;
+#else
+ *h = x86_guest_base;
+#endif
+ h->base = addrlo;
+ h->aa = atom_and_align_for_opc(s, opc, MO_ATOM_IFALIGN, false);
+ a_mask = (1 << h->aa.align) - 1;
#ifdef CONFIG_SOFTMMU
int cmp_ofs = is_ld ? offsetof(CPUTLBEntry, addr_read)
* copy the address and mask. For lesser alignments, check that we don't
* cross pages for the complete access.
*/
- if (a_bits >= s_bits) {
+ if (a_mask >= s_mask) {
tcg_out_mov(s, ttype, TCG_REG_L1, addrlo);
} else {
tcg_out_modrm_offset(s, OPC_LEA + trexw, TCG_REG_L1,
/* TLB Hit. */
tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_L0, TCG_REG_L0,
offsetof(CPUTLBEntry, addend));
-
- *h = (HostAddress) {
- .base = addrlo,
- .index = TCG_REG_L0,
- };
#else
- if (a_bits) {
+ if (a_mask) {
ldst = new_ldst_label(s);
ldst->is_ld = is_ld;
ldst->label_ptr[0] = s->code_ptr;
s->code_ptr += 4;
}
-
- *h = x86_guest_base;
- h->base = addrlo;
#endif
return ldst;