EHCIState *s = container_of(bus, EHCIState, bus);
uint32_t i;
- if (firstport + portcount > NB_PORTS) {
+ if (firstport + portcount > EHCI_PORTS) {
error_setg(errp, "firstport must be between 0 and %u",
- NB_PORTS - portcount);
+ EHCI_PORTS - portcount);
return;
}
USBPort *port;
int i;
- for (i = 0; i < NB_PORTS; i++) {
+ for (i = 0; i < EHCI_PORTS; i++) {
port = &ehci->ports[i];
if (!(ehci->portsc[i] & PORTSC_PED)) {
DPRINTF("Port %d not enabled\n", i);
{
EHCIState *s = opaque;
int i;
- USBDevice *devs[NB_PORTS];
+ USBDevice *devs[EHCI_PORTS];
trace_usb_ehci_reset();
* Do the detach before touching portsc, so that it correctly gets send to
* us or to our companion based on PORTSC_POWNER before the reset.
*/
- for(i = 0; i < NB_PORTS; i++) {
+ for(i = 0; i < EHCI_PORTS; i++) {
devs[i] = s->ports[i].dev;
if (devs[i] && devs[i]->attached) {
usb_detach(&s->ports[i]);
s->astate = EST_INACTIVE;
s->pstate = EST_INACTIVE;
- for(i = 0; i < NB_PORTS; i++) {
+ for(i = 0; i < EHCI_PORTS; i++) {
if (s->companion_ports[i]) {
s->portsc[i] = PORTSC_POWNER | PORTSC_PPOWER;
} else {
case CONFIGFLAG:
val &= 0x1;
if (val) {
- for (i = 0; i < NB_PORTS; i++) {
+ for (i = 0; i < EHCI_PORTS; i++) {
handle_port_owner_write(s, i, 0);
}
}
EHCIState *s = opaque;
int i;
- for (i = 0; i < NB_PORTS; i++) {
+ for (i = 0; i < EHCI_PORTS; i++) {
USBPort *companion = s->companion_ports[i];
if (companion == NULL) {
continue;
{
int i;
- if (s->portnr > NB_PORTS) {
+ if (s->portnr > EHCI_PORTS) {
error_setg(errp, "Too many ports! Max. port number is %d.",
- NB_PORTS);
+ EHCI_PORTS);
return;
}
if (s->maxframes < 8 || s->maxframes > 512) {
#define MMIO_SIZE 0x1000
#define CAPA_SIZE 0x10
-#define NB_PORTS 6 /* Max. Number of downstream ports */
+#define EHCI_PORTS 6 /* Max. Number of downstream ports */
typedef struct EHCIPacket EHCIPacket;
typedef struct EHCIQueue EHCIQueue;
uint32_t configflag;
};
};
- uint32_t portsc[NB_PORTS];
+ uint32_t portsc[EHCI_PORTS];
/*
* Internal states, shadow registers, etc
bool working;
uint32_t astate; /* Current state in asynchronous schedule */
uint32_t pstate; /* Current state in periodic schedule */
- USBPort ports[NB_PORTS];
- USBPort *companion_ports[NB_PORTS];
+ USBPort ports[EHCI_PORTS];
+ USBPort *companion_ports[EHCI_PORTS];
uint32_t usbsts_pending;
uint32_t usbsts_frindex;
EHCIQueueHead aqueues;