media: imx: imx7_mipi_csis: Print shadow registers in mipi_csis_dump_regs()
authorLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Mon, 15 Feb 2021 04:27:41 +0000 (05:27 +0100)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Thu, 11 Mar 2021 10:59:53 +0000 (11:59 +0100)
Print the value of the ISP shadow registers in mipi_csis_dump_regs() as
this can help debugging.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rui Miguel Silva <rmfrfs@gmail.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/staging/media/imx/imx7-mipi-csis.c

index b1cdc2403a45ba4fe232a99e2ebc749e2daccec1..bd587e550d9920dada9748c73c7bb2ba9e78a851 100644 (file)
 #define MIPI_CSIS_ISP_SYNC_VSYNC_SINTV_OFFSET  12
 #define MIPI_CSIS_ISP_SYNC_VSYNC_EINTV_OFFSET  0
 
+/* ISP shadow registers */
+#define MIPI_CSIS_SDW_CONFIG_CH(n)             (0x80 + (n) * 0x10)
+#define MIPI_CSIS_SDW_RESOL_CH(n)              (0x84 + (n) * 0x10)
+#define MIPI_CSIS_SDW_SYNC_CH(n)               (0x88 + (n) * 0x10)
+
 /* Debug control register */
 #define MIPI_CSIS_DBG_CTRL                     0xc0
 
@@ -411,6 +416,8 @@ static int mipi_csis_dump_regs(struct csi_state *state)
                { MIPI_CSIS_DPHY_SCTRL_H, "DPHY_SCTRL_H" },
                { MIPI_CSIS_ISP_CONFIG_CH(0), "ISP_CONFIG_CH0" },
                { MIPI_CSIS_ISP_RESOL_CH(0), "ISP_RESOL_CH0" },
+               { MIPI_CSIS_SDW_CONFIG_CH(0), "SDW_CONFIG_CH0" },
+               { MIPI_CSIS_SDW_RESOL_CH(0), "SDW_RESOL_CH0" },
                { MIPI_CSIS_DBG_CTRL, "DBG_CTRL" },
        };