ASoC: SOF: Intel: pci-mtl: add HDA_ARL PCI support
authorPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Mon, 4 Dec 2023 21:27:10 +0000 (15:27 -0600)
committerTakashi Iwai <tiwai@suse.de>
Thu, 7 Dec 2023 08:29:17 +0000 (09:29 +0100)
Add yet another PCI ID - the hardware shares the same descriptors as
MTL but we use a dedicated firmware binary file to allow for different
signature keys.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Acked-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20231204212710.185976-6-pierre-louis.bossart@linux.intel.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
sound/soc/sof/intel/pci-mtl.c

index 60d5e73cdad26e3a9f067f707ccf13c6acabe77e..cacc985d80f4152887c2c7f7e5b2649fbb226067 100644 (file)
@@ -50,6 +50,36 @@ static const struct sof_dev_desc mtl_desc = {
        .ops_free = hda_ops_free,
 };
 
+static const struct sof_dev_desc arl_desc = {
+       .use_acpi_target_states = true,
+       .machines               = snd_soc_acpi_intel_arl_machines,
+       .alt_machines           = snd_soc_acpi_intel_arl_sdw_machines,
+       .resindex_lpe_base      = 0,
+       .resindex_pcicfg_base   = -1,
+       .resindex_imr_base      = -1,
+       .irqindex_host_ipc      = -1,
+       .chip_info = &mtl_chip_info,
+       .ipc_supported_mask     = BIT(SOF_IPC_TYPE_4),
+       .ipc_default            = SOF_IPC_TYPE_4,
+       .dspless_mode_supported = true,         /* Only supported for HDaudio */
+       .default_fw_path = {
+               [SOF_IPC_TYPE_4] = "intel/sof-ipc4/arl",
+       },
+       .default_lib_path = {
+               [SOF_IPC_TYPE_4] = "intel/sof-ipc4-lib/arl",
+       },
+       .default_tplg_path = {
+               [SOF_IPC_TYPE_4] = "intel/sof-ace-tplg",
+       },
+       .default_fw_filename = {
+               [SOF_IPC_TYPE_4] = "sof-arl.ri",
+       },
+       .nocodec_tplg_filename = "sof-arl-nocodec.tplg",
+       .ops = &sof_mtl_ops,
+       .ops_init = sof_mtl_ops_init,
+       .ops_free = hda_ops_free,
+};
+
 static const struct sof_dev_desc arl_s_desc = {
        .use_acpi_target_states = true,
        .machines               = snd_soc_acpi_intel_arl_machines,
@@ -84,6 +114,7 @@ static const struct sof_dev_desc arl_s_desc = {
 static const struct pci_device_id sof_pci_ids[] = {
        { PCI_DEVICE_DATA(INTEL, HDA_MTL, &mtl_desc) },
        { PCI_DEVICE_DATA(INTEL, HDA_ARL_S, &arl_s_desc) },
+       { PCI_DEVICE_DATA(INTEL, HDA_ARL, &arl_desc) },
        { 0, }
 };
 MODULE_DEVICE_TABLE(pci, sof_pci_ids);