habanalabs/gaudi2: configure virtual MSI-X doorbell interface

Due to a watchdog timer in the LBW path, writes to the MSI-X doorbell
can return sporadic error responses.
To work-around this issue, a virtual MSI-X doorbell on the HBW path is
configured, using the MSI-X AXI slave interface in the PCIe controller.
Upon an access to a configured HBW host address, the controller will
generate MSI-X interrupt instead of treating the access as regular host
memory access.

This patch allocates the dedicate host memory page, and communicate the
address to F/W, so it will configure the relevant address match
registers in the controller, and will use this address to generate MSI-X
interrupts for F/W events.

Following patches will handle other initiators in the device, to move
them to use the virtual MSI-X doorbell.

Signed-off-by: Tomer Tayar <ttayar@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>

diff --git a/drivers/misc/habanalabs/gaudi2/gaudi2.c b/drivers/misc/habanalabs/gaudi2/gaudi2.c
index db061b22587ba58f0fbe3993d6924357e98912ad..76b002a3976395943e4047444aa855fa2d5182d4 100644 (file)
--- a/drivers/misc/habanalabs/gaudi2/gaudi2.c
+++ b/drivers/misc/habanalabs/gaudi2/gaudi2.c
@@ -2673,9 +2673,11 @@ static void gaudi2_scrub_arcs_dccm(struct hl_device *hdev)
 
 static int gaudi2_late_init(struct hl_device *hdev)
 {
+       struct gaudi2_device *gaudi2 = hdev->asic_specific;
        int rc;
 
-       rc = hl_fw_send_pci_access_msg(hdev, CPUCP_PACKET_ENABLE_PCI_ACCESS, 0x0);
+       rc = hl_fw_send_pci_access_msg(hdev, CPUCP_PACKET_ENABLE_PCI_ACCESS,
+                                       gaudi2->virt_msix_db_dma_addr);
        if (rc) {
                dev_err(hdev->dev, "Failed to enable PCI access from CPU\n");
                return rc;
@@ -2922,6 +2924,7 @@ static inline int gaudi2_get_non_zero_random_int(void)
 
 static int gaudi2_sw_init(struct hl_device *hdev)
 {
+       struct asic_fixed_properties *prop = &hdev->asic_prop;
        struct gaudi2_device *gaudi2;
        int i, rc;
 
@@ -2982,6 +2985,14 @@ static int gaudi2_sw_init(struct hl_device *hdev)
                goto free_cpu_accessible_dma_pool;
        }
 
+       gaudi2->virt_msix_db_cpu_addr = hl_cpu_accessible_dma_pool_alloc(hdev, prop->pmmu.page_size,
+                                                               &gaudi2->virt_msix_db_dma_addr);
+       if (!gaudi2->virt_msix_db_cpu_addr) {
+               dev_err(hdev->dev, "Failed to allocate DMA memory for virtual MSI-X doorbell\n");
+               rc = -ENOMEM;
+               goto free_cpu_accessible_dma_pool;
+       }
+
        spin_lock_init(&gaudi2->hw_queues_lock);
        spin_lock_init(&gaudi2->kdma_lock);
 
@@ -2990,7 +3001,7 @@ static int gaudi2_sw_init(struct hl_device *hdev)
                                                        GFP_KERNEL | __GFP_ZERO);
        if (!gaudi2->scratchpad_kernel_address) {
                rc = -ENOMEM;
-               goto free_cpu_accessible_dma_pool;
+               goto free_virt_msix_db_mem;
        }
 
        gaudi2_user_mapped_blocks_init(hdev);
@@ -2999,15 +3010,18 @@ static int gaudi2_sw_init(struct hl_device *hdev)
        gaudi2_user_interrupt_setup(hdev);
 
        hdev->supports_coresight = true;
-       hdev->asic_prop.supports_soft_reset = true;
        hdev->supports_sync_stream = true;
        hdev->supports_cb_mapping = true;
        hdev->supports_wait_for_multi_cs = false;
 
+       prop->supports_soft_reset = true;
+
        hdev->asic_funcs->set_pci_memory_regions(hdev);
 
        return 0;
 
+free_virt_msix_db_mem:
+       hl_cpu_accessible_dma_pool_free(hdev, prop->pmmu.page_size, gaudi2->virt_msix_db_cpu_addr);
 free_cpu_accessible_dma_pool:
        gen_pool_destroy(hdev->cpu_accessible_dma_pool);
 free_cpu_dma_mem:
@@ -3022,8 +3036,11 @@ free_gaudi2_device:
 
 static int gaudi2_sw_fini(struct hl_device *hdev)
 {
+       struct asic_fixed_properties *prop = &hdev->asic_prop;
        struct gaudi2_device *gaudi2 = hdev->asic_specific;
 
+       hl_cpu_accessible_dma_pool_free(hdev, prop->pmmu.page_size, gaudi2->virt_msix_db_cpu_addr);
+
        gen_pool_destroy(hdev->cpu_accessible_dma_pool);
 
        hl_asic_dma_free_coherent(hdev, HL_CPU_ACCESSIBLE_MEM_SIZE, hdev->cpu_accessible_dma_mem,

diff --git a/drivers/misc/habanalabs/gaudi2/gaudi2P.h b/drivers/misc/habanalabs/gaudi2/gaudi2P.h
index dc0094a2a9110dd4fe15af7af3da89abda6a02c5..012413d7df9af57fa21078261f7a79c926d4f578 100644 (file)
--- a/drivers/misc/habanalabs/gaudi2/gaudi2P.h
+++ b/drivers/misc/habanalabs/gaudi2/gaudi2P.h
@@ -439,6 +439,8 @@ struct dup_block_ctx {
  *                             currently used for HBW QMAN writes which is
  *                             redundant.
  * @scratchpad_bus_address: scratchpad bus address
+ * @virt_msix_db_cpu_addr: host memory page for the virtual MSI-X doorbell.
+ * @virt_msix_db_dma_addr: bus address of the page for the virtual MSI-X doorbell.
  * @dram_bar_cur_addr: current address of DRAM PCI bar.
  * @hw_cap_initialized: This field contains a bit per H/W engine. When that
  *                      engine is initialized, that bit is set by the driver to
@@ -499,6 +501,9 @@ struct gaudi2_device {
        void                            *scratchpad_kernel_address;
        dma_addr_t                      scratchpad_bus_address;
 
+       void                            *virt_msix_db_cpu_addr;
+       dma_addr_t                      virt_msix_db_dma_addr;
+
        u64                             dram_bar_cur_addr;
        u64                             hw_cap_initialized;
        u64                             active_hw_arc;

diff --git a/drivers/misc/habanalabs/gaudi2/gaudi2_masks.h b/drivers/misc/habanalabs/gaudi2/gaudi2_masks.h
index 19ec1f130befbdc6e92ba1227386914b6c179b64..3fd5cf4a864504105815e13b413007645f09ff64 100644 (file)
--- a/drivers/misc/habanalabs/gaudi2/gaudi2_masks.h
+++ b/drivers/misc/habanalabs/gaudi2/gaudi2_masks.h
@@ -132,4 +132,7 @@
 #define ROT_MSS_HALT_RSB_MASK  BIT(1)
 #define ROT_MSS_HALT_MRSB_MASK BIT(2)
 
+#define PCIE_DBI_MSIX_ADDRESS_MATCH_LOW_OFF_MSIX_ADDRESS_MATCH_EN_SHIFT        0
+#define PCIE_DBI_MSIX_ADDRESS_MATCH_LOW_OFF_MSIX_ADDRESS_MATCH_EN_MASK 0x1
+
 #endif /* GAUDI2_MASKS_H_ */