arm64: dts: renesas: r9a08g045: Add missing cache-level for L3 cache

Fix the following DTBS check warnings:

    arch/arm64/boot/dts/renesas/r9a08g045s33-smarc.dtb: cache-controller-0: 'cache-level' is a required property
	    from schema $id: http://devicetree.org/schemas/cache.yaml#
    arch/arm64/boot/dts/renesas/r9a08g045s33-smarc.dtb: cache-controller-0: 'cache-level' is a required property
	    from schema $id: http://devicetree.org/schemas/cache.yaml#
    arch/arm64/boot/dts/renesas/r9a08g045s33-smarc.dtb: cache-controller-0: Unevaluated properties are not allowed ('cache-size', 'cache-unified' were unexpected)
	    from schema $id: http://devicetree.org/schemas/cache.yaml#

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231010132701.1658737-7-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
index 534b728a8e14b927b064c66eddc602f06f6b21d3..6c7b29b69d0e104b6e77c3c51b23428c2b22ad36 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
@@ -29,6 +29,7 @@
 
                L3_CA55: cache-controller-0 {
                        compatible = "cache";
+                       cache-level = <3>;
                        cache-unified;
                        cache-size = <0x40000>;
                };