arm64: zynqmp: Set qspi tx-buswidth to 4

All ZynqMP boards are setting up tx-buswidth to 1. Due to this the
framework only issues 1-1-1 write commands to the GQSPI driver. But the
GQSPI controller is capable of handling 1-4-4 write commands, so updated
the tx-buswidth to 4.
Using all 4 lines will increase the tx data transfer rate, as now the
tx data will be transferred on four lines instead on single line.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1f1b0028106d83aa06e0777e91862a07df100fa1.1684767562.git.michal.simek@amd.com

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
index c1ab1ab690df47ce4cd5aeee049d5258f819016a..84e18fdce7752d1d79a266b1b914af87e58f04b4 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
@@ -124,7 +124,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                reg = <0>;
-               spi-tx-bus-width = <1>;
+               spi-tx-bus-width = <4>;
                spi-rx-bus-width = <4>;
                spi-max-frequency = <40000000>; /* 40MHz */
                partition@0 {

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts
index 48d6a72024065f640ccc1117bafd11ec7f533ce2..04079d1704f1f61dadf89c0c251c92c8735dd642 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts
@@ -44,7 +44,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                reg = <0x0>;
-               spi-tx-bus-width = <1>;
+               spi-tx-bus-width = <4>;
                spi-rx-bus-width = <4>;
                spi-max-frequency = <108000000>; /* Based on DC1 spec */
        };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
index e80484f9b1379131c2024e2fbcfd5099339b713f..3dec57cf18be061376f0cecfdacdd1cedd1d2ae4 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
@@ -45,7 +45,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                reg = <0x0>;
-               spi-tx-bus-width = <1>;
+               spi-tx-bus-width = <4>;
                spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
                spi-max-frequency = <108000000>; /* Based on DC1 spec */
        };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
index af3331c133ad44c94536bd4ed6a6b5d86da125ae..d9d1de5f313c1f8d5175622c7331686d758da9cb 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
@@ -355,7 +355,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                reg = <0x0>;
-               spi-tx-bus-width = <1>;
+               spi-tx-bus-width = <4>;
                spi-rx-bus-width = <4>;
                spi-max-frequency = <108000000>; /* Based on DC1 spec */
        };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
index 05be71eab722fc19cf61ed2a51b93cf516d0058d..6636e76545a5d9f977dbcc5755da6b427e1aa612 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
@@ -173,7 +173,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                reg = <0x0>;
-               spi-tx-bus-width = <1>;
+               spi-tx-bus-width = <4>;
                spi-rx-bus-width = <4>; /* also DUAL configuration possible */
                spi-max-frequency = <108000000>; /* Based on DC1 spec */
        };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
index a074d8e2b86d27ca1118cb70365f2d6d87d45376..8767f147cbe33ffca3f9928ca2d1b1dfbaf9881b 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
@@ -957,7 +957,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                reg = <0x0>;
-               spi-tx-bus-width = <1>;
+               spi-tx-bus-width = <4>;
                spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
                spi-max-frequency = <108000000>; /* Based on DC1 spec */
        };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
index 91c9b77f6b1ff726b15f2fdef8e02e477fb88f50..e185709c0d8423fc3f48c0535f877397e7b419c0 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
@@ -444,7 +444,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                reg = <0x0>;
-               spi-tx-bus-width = <1>;
+               spi-tx-bus-width = <4>;
                spi-rx-bus-width = <4>;
                spi-max-frequency = <108000000>; /* Based on DC1 spec */
        };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
index 954044d9899f66eee7a9a0defa1908edb20d9012..7fceebd1815cf97f32268ddbb408ac5425ce04bb 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
@@ -456,7 +456,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                reg = <0x0>;
-               spi-tx-bus-width = <1>;
+               spi-tx-bus-width = <4>;
                spi-rx-bus-width = <4>;
                spi-max-frequency = <108000000>; /* Based on DC1 spec */
        };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
index ab5e34b436429342b68f6d42af71740c0cc90121..27b2416cb6d8b434c842f447861197bab38eeeb5 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
@@ -964,7 +964,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                reg = <0x0>;
-               spi-tx-bus-width = <1>;
+               spi-tx-bus-width = <4>;
                spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
                spi-max-frequency = <108000000>; /* Based on DC1 spec */
        };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
index f31365a14f7326f5dac4162a4509547689106474..6224365826d8cee83c781e4f9388b52a04450c4f 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
@@ -794,7 +794,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                reg = <0x0>;
-               spi-tx-bus-width = <1>;
+               spi-tx-bus-width = <4>;
                spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
                spi-max-frequency = <108000000>; /* Based on DC1 spec */
        };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
index e615286b8effc5d74125a7d78d9ac2988c8050a4..c406017b0348f240393cd6ffaf14864e53babd1b 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
@@ -47,7 +47,7 @@
        flash@0 {
                compatible = "m25p80", "jedec,spi-nor";
                reg = <0x0>;
-               spi-tx-bus-width = <1>;
+               spi-tx-bus-width = <4>;
                spi-rx-bus-width = <4>;
                spi-max-frequency = <108000000>;
        };