drm/i915: Extract hsw_configure_cpu_transcoder()

Pull the transcoder specific modeset steps into a single place.
With bigoiner we need to keep in mind wheher we're dealing with
the transcoder or the pipe, and a slightly higher level split makes
that easier.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220124192638.26262-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 250561eab1e59144e1fe773cfffefb3b3056ac86..98fad1bae6ffbc7b8e20532136d707b389773047 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2011,6 +2011,27 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
                intel_uncompressed_joiner_enable(crtc_state);
 }
 
+static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state)
+{
+       struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+       struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+       enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+
+       intel_set_transcoder_timings(crtc_state);
+
+       if (cpu_transcoder != TRANSCODER_EDP)
+               intel_de_write(dev_priv, PIPE_MULT(cpu_transcoder),
+                              crtc_state->pixel_multiplier - 1);
+
+       if (crtc_state->has_pch_encoder)
+               intel_cpu_transcoder_set_m_n(crtc_state,
+                                            &crtc_state->fdi_m_n, NULL);
+
+       hsw_set_frame_start_delay(crtc_state);
+
+       hsw_set_transconf(crtc_state);
+}
+
 static void hsw_crtc_enable(struct intel_atomic_state *state,
                            struct intel_crtc *crtc)
 {
@@ -2039,21 +2060,8 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
        if (DISPLAY_VER(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
                bdw_set_pipemisc(new_crtc_state);
 
-       if (!new_crtc_state->bigjoiner_slave && !transcoder_is_dsi(cpu_transcoder)) {
-               intel_set_transcoder_timings(new_crtc_state);
-
-               if (cpu_transcoder != TRANSCODER_EDP)
-                       intel_de_write(dev_priv, PIPE_MULT(cpu_transcoder),
-                                      new_crtc_state->pixel_multiplier - 1);
-
-               if (new_crtc_state->has_pch_encoder)
-                       intel_cpu_transcoder_set_m_n(new_crtc_state,
-                                                    &new_crtc_state->fdi_m_n, NULL);
-
-               hsw_set_frame_start_delay(new_crtc_state);
-
-               hsw_set_transconf(new_crtc_state);
-       }
+       if (!new_crtc_state->bigjoiner_slave && !transcoder_is_dsi(cpu_transcoder))
+               hsw_configure_cpu_transcoder(new_crtc_state);
 
        crtc->active = true;