if (flags &
                    VNIC_QCAPS_RESP_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_CAP)
                        bp->flags |= BNXT_FLAG_ROCE_MIRROR_CAP;
+
+               /* Older P5 fw before EXT_HW_STATS support did not set
+                * VLAN_STRIP_CAP properly.
+                */
+               if ((flags & VNIC_QCAPS_RESP_FLAGS_VLAN_STRIP_CAP) ||
+                   ((bp->flags & BNXT_FLAG_CHIP_P5) &&
+                    !(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED)))
+                       bp->fw_cap |= BNXT_FW_CAP_VLAN_RX_STRIP;
                bp->max_tpa_v2 = le16_to_cpu(resp->max_aggs_supported);
                if (bp->max_tpa_v2)
                        bp->hw_ring_stats_size =
        struct hwrm_func_qcaps_input req = {0};
        struct hwrm_func_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
        struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
-       u32 flags;
+       u32 flags, flags_ext;
 
        bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_QCAPS, -1, -1);
        req.fid = cpu_to_le16(0xffff);
                bp->fw_cap |= BNXT_FW_CAP_ERROR_RECOVERY;
        if (flags & FUNC_QCAPS_RESP_FLAGS_ERR_RECOVER_RELOAD)
                bp->fw_cap |= BNXT_FW_CAP_ERR_RECOVER_RELOAD;
+       if (!(flags & FUNC_QCAPS_RESP_FLAGS_VLAN_ACCELERATION_TX_DISABLED))
+               bp->fw_cap |= BNXT_FW_CAP_VLAN_TX_INSERT;
+
+       flags_ext = le32_to_cpu(resp->flags_ext);
+       if (flags_ext & FUNC_QCAPS_RESP_FLAGS_EXT_EXT_HW_STATS_SUPPORTED)
+               bp->fw_cap |= BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED;
 
        bp->tx_push_thresh = 0;
        if ((flags & FUNC_QCAPS_RESP_FLAGS_PUSH_MODE_SUPPORTED) &&
        dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM |
                                    NETIF_F_GSO_GRE_CSUM;
        dev->vlan_features = dev->hw_features | NETIF_F_HIGHDMA;
-       dev->hw_features |= BNXT_HW_FEATURE_VLAN_ALL_RX |
-                           BNXT_HW_FEATURE_VLAN_ALL_TX;
+       if (bp->fw_cap & BNXT_FW_CAP_VLAN_RX_STRIP)
+               dev->hw_features |= BNXT_HW_FEATURE_VLAN_ALL_RX;
+       if (bp->fw_cap & BNXT_FW_CAP_VLAN_TX_INSERT)
+               dev->hw_features |= BNXT_HW_FEATURE_VLAN_ALL_TX;
        if (BNXT_SUPPORTS_TPA(bp))
                dev->hw_features |= NETIF_F_GRO_HW;
        dev->features |= dev->hw_features | NETIF_F_HIGHDMA;
 
        #define BNXT_FW_CAP_ERR_RECOVER_RELOAD          0x00100000
        #define BNXT_FW_CAP_HOT_RESET                   0x00200000
        #define BNXT_FW_CAP_SHARED_PORT_CFG             0x00400000
+       #define BNXT_FW_CAP_VLAN_RX_STRIP               0x01000000
+       #define BNXT_FW_CAP_VLAN_TX_INSERT              0x02000000
+       #define BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED      0x04000000
 
 #define BNXT_NEW_RM(bp)                ((bp)->fw_cap & BNXT_FW_CAP_NEW_RM)
        u32                     hwrm_spec_code;