drm/amd/display: Remove invalid RDPCS Programming in DAL

RDPCS programming is done in DMUB remove legacy invalid code

Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Hansen Dsouza <Hansen.Dsouza@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
index 8b9b1a5309bab8d703379a951e1eaa56408ccaa2..d94fd1010debcfa582f11294d0039bbfef23ff17 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
@@ -240,18 +240,9 @@ static void enc31_hw_init(struct link_encoder *enc)
        // 100MHz -> 0x32
        // 48MHz -> 0x18
 
-#ifdef CLEANUP_FIXME
-       /*from display_init*/
-       REG_WRITE(RDPCSTX_DEBUG_CONFIG, 0);
-#endif
-
        // Set TMDS_CTL0 to 1.  This is a legacy setting.
        REG_UPDATE(TMDS_CTL_BITS, TMDS_CTL0, 1);
 
-       /*HW default is 5*/
-       REG_UPDATE(RDPCSTX_CNTL,
-                       RDPCS_TX_FIFO_RD_START_DELAY, 4);
-
        dcn10_aux_initialize(enc10);
 }