/* Fill up the empty slots in sha_text and write it out */
                sha_empty = sizeof(sha_text) - sha_leftovers;
-               for (j = 0; j < sha_empty; j++)
-                       sha_text |= ksv[j] << ((sizeof(sha_text) - j - 1) * 8);
+               for (j = 0; j < sha_empty; j++) {
+                       u8 off = ((sizeof(sha_text) - j - 1 - sha_leftovers) * 8);
+                       sha_text |= ksv[j] << off;
+               }
 
                ret = intel_write_sha_text(dev_priv, sha_text);
                if (ret < 0)
                /* Write 32 bits of text */
                intel_de_write(dev_priv, HDCP_REP_CTL,
                               rep_ctl | HDCP_SHA1_TEXT_32);
-               sha_text |= bstatus[0] << 24 | bstatus[1] << 16;
+               sha_text |= bstatus[0] << 8 | bstatus[1];
                ret = intel_write_sha_text(dev_priv, sha_text);
                if (ret < 0)
                        return ret;
                                return ret;
                        sha_idx += sizeof(sha_text);
                }
+
+               /*
+                * Terminate the SHA-1 stream by hand. For the other leftover
+                * cases this is appended by the hardware.
+                */
+               intel_de_write(dev_priv, HDCP_REP_CTL,
+                              rep_ctl | HDCP_SHA1_TEXT_32);
+               sha_text = DRM_HDCP_SHA1_TERMINATOR << 24;
+               ret = intel_write_sha_text(dev_priv, sha_text);
+               if (ret < 0)
+                       return ret;
+               sha_idx += sizeof(sha_text);
        } else if (sha_leftovers == 3) {
-               /* Write 32 bits of text */
+               /* Write 32 bits of text (filled from LSB) */
                intel_de_write(dev_priv, HDCP_REP_CTL,
                               rep_ctl | HDCP_SHA1_TEXT_32);
-               sha_text |= bstatus[0] << 24;
+               sha_text |= bstatus[0];
                ret = intel_write_sha_text(dev_priv, sha_text);
                if (ret < 0)
                        return ret;
                sha_idx += sizeof(sha_text);
 
-               /* Write 8 bits of text, 24 bits of M0 */
+               /* Write 8 bits of text (filled from LSB), 24 bits of M0 */
                intel_de_write(dev_priv, HDCP_REP_CTL,
                               rep_ctl | HDCP_SHA1_TEXT_8);
                ret = intel_write_sha_text(dev_priv, bstatus[1]);