iommu/amd: Fix error handling for pdev_pri_ats_enable()
authorVasant Hegde <vasant.hegde@amd.com>
Wed, 11 Jan 2023 12:15:03 +0000 (12:15 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 11 Mar 2023 12:57:33 +0000 (13:57 +0100)
[ Upstream commit 080920e52148b4fbbf9360d5345fdcd7846e4841 ]

Current code throws kernel warning if it fails to enable pasid/pri [1].
Do not call pci_disable_[pasid/pri] if pci_enable_[pasid/pri] failed.

[1] https://lore.kernel.org/linux-iommu/15d0f9ff-2a56-b3e9-5b45-e6b23300ae3b@leemhuis.info/

Reported-by: Matt Fagnani <matt.fagnani@bell.net>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Link: https://lore.kernel.org/r/20230111121503.5931-1-vasant.hegde@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/iommu/amd/iommu.c

index 7154fb551ddc92725ff73c9964bbff80896b6db2..5ceaaabb4f9da049c8b60a9e503e356dc3b0c9b0 100644 (file)
@@ -1586,27 +1586,29 @@ static int pdev_iommuv2_enable(struct pci_dev *pdev)
        /* Only allow access to user-accessible pages */
        ret = pci_enable_pasid(pdev, 0);
        if (ret)
-               goto out_err;
+               return ret;
 
        /* First reset the PRI state of the device */
        ret = pci_reset_pri(pdev);
        if (ret)
-               goto out_err;
+               goto out_err_pasid;
 
        /* Enable PRI */
        /* FIXME: Hardcode number of outstanding requests for now */
        ret = pci_enable_pri(pdev, 32);
        if (ret)
-               goto out_err;
+               goto out_err_pasid;
 
        ret = pci_enable_ats(pdev, PAGE_SHIFT);
        if (ret)
-               goto out_err;
+               goto out_err_pri;
 
        return 0;
 
-out_err:
+out_err_pri:
        pci_disable_pri(pdev);
+
+out_err_pasid:
        pci_disable_pasid(pdev);
 
        return ret;