bpf: prevent r10 register from being marked as precise
authorAndrii Nakryiko <andrii@kernel.org>
Thu, 4 Apr 2024 21:45:35 +0000 (14:45 -0700)
committerAlexei Starovoitov <ast@kernel.org>
Fri, 5 Apr 2024 01:31:08 +0000 (18:31 -0700)
r10 is a special register that is not under BPF program's control and is
always effectively precise. The rest of precision logic assumes that
only r0-r9 SCALAR registers are marked as precise, so prevent r10 from
being marked precise.

This can happen due to signed cast instruction allowing to do something
like `r0 = (s8)r10;`, which later, if r0 needs to be precise, would lead
to an attempt to mark r10 as precise.

Prevent this with an extra check during instruction backtracking.

Fixes: 8100928c8814 ("bpf: Support new sign-extension mov insns")
Reported-by: syzbot+148110ee7cf72f39f33e@syzkaller.appspotmail.com
Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Acked-by: Yonghong Song <yonghong.song@linux.dev>
Link: https://lore.kernel.org/r/20240404214536.3551295-1-andrii@kernel.org
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
kernel/bpf/verifier.c

index ffaa9f7f153cfd3afe2ff9a3845364d82069b98e..41446bea8fabf1a05deea1f33a4f1a58f18c3bc3 100644 (file)
@@ -3615,7 +3615,8 @@ static int backtrack_insn(struct bpf_verifier_env *env, int idx, int subseq_idx,
                                 * sreg needs precision before this insn
                                 */
                                bt_clear_reg(bt, dreg);
-                               bt_set_reg(bt, sreg);
+                               if (sreg != BPF_REG_FP)
+                                       bt_set_reg(bt, sreg);
                        } else {
                                /* dreg = K
                                 * dreg needs precision after this insn.
@@ -3631,7 +3632,8 @@ static int backtrack_insn(struct bpf_verifier_env *env, int idx, int subseq_idx,
                                 * both dreg and sreg need precision
                                 * before this insn
                                 */
-                               bt_set_reg(bt, sreg);
+                               if (sreg != BPF_REG_FP)
+                                       bt_set_reg(bt, sreg);
                        } /* else dreg += K
                           * dreg still needs precision before this insn
                           */