clk: qcom: mmcc-msm8998: Fix the SMMU GDSC

The SMMU GDSC doesn't have to be ALWAYS-ON and shouldn't feature the
HW_CTRL flag (it's separate from hw_ctrl_addr).  In addition to that,
it should feature a cxc entry for bimc_smmu_axi_clk and be marked as
votable.

Fix all of these issues.

Fixes: d14b15b5931c ("clk: qcom: Add MSM8998 Multimedia Clock Controller (MMCC) driver")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Link: https://lore.kernel.org/r/20230531-topic-8998_mmssclk-v3-5-ba1b1fd9ee75@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/mmcc-msm8998.c b/drivers/clk/qcom/mmcc-msm8998.c
index b0b51adb73a54ff72f58d6efe86a31d04b59e391..1180e48c687ac4fa5cd0f5288187673ea67f314c 100644 (file)
--- a/drivers/clk/qcom/mmcc-msm8998.c
+++ b/drivers/clk/qcom/mmcc-msm8998.c
@@ -2610,11 +2610,13 @@ static struct gdsc camss_cpp_gdsc = {
 static struct gdsc bimc_smmu_gdsc = {
        .gdscr = 0xe020,
        .gds_hw_ctrl = 0xe024,
+       .cxcs = (unsigned int []){ 0xe008 },
+       .cxc_count = 1,
        .pd = {
                .name = "bimc_smmu",
        },
        .pwrsts = PWRSTS_OFF_ON,
-       .flags = HW_CTRL | ALWAYS_ON,
+       .flags = VOTABLE,
 };
 
 static struct clk_regmap *mmcc_msm8998_clocks[] = {