intel_state->ggtt_vma = NULL;
intel_state->dpt_vma = NULL;
intel_state->flags = 0;
+ intel_state->do_async_flip = false;
/* add reference to fb */
if (intel_state->hw.fb)
trace_intel_plane_update_arm(&plane->base, crtc);
- if (crtc_state->uapi.async_flip && plane->async_flip)
+ if (plane_state->do_async_flip)
plane->async_flip(plane, crtc_state, plane_state, true);
else
plane->update_arm(plane, crtc_state, plane_state);
for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
if (plane->enable_flip_done &&
plane->pipe == crtc->pipe &&
- update_planes & BIT(plane->id))
+ update_planes & BIT(plane->id) &&
+ plane_state->do_async_flip)
plane->enable_flip_done(plane);
}
}
for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
if (plane->disable_flip_done &&
plane->pipe == crtc->pipe &&
- update_planes & BIT(plane->id))
+ update_planes & BIT(plane->id) &&
+ plane_state->do_async_flip)
plane->disable_flip_done(plane);
}
}
needs_scaling(new_plane_state))))
new_crtc_state->disable_lp_wm = true;
+ if (new_crtc_state->uapi.async_flip && plane->async_flip)
+ new_plane_state->do_async_flip = true;
+
return 0;
}