drm/i915: use engine->irq_keep_mask when resetting irqs

The "reset" value and the "keep" value are the same.
While we are here, add a TODO for gen11 interrupt reset

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180314182653.26981-3-daniele.ceraolospurio@intel.com

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 3a69b367e56552114a1048f41204ab03d8692705..5e8f6896d059006f3b6c6e74391be5d146de2522 100644 (file)
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1666,6 +1666,10 @@ static void reset_irq(struct intel_engine_cs *engine)
        struct drm_i915_private *dev_priv = engine->i915;
        int i;
 
+       /* TODO: correctly reset irqs for gen11 */
+       if (WARN_ON_ONCE(INTEL_GEN(engine->i915) >= 11))
+               return;
+
        GEM_BUG_ON(engine->id >= ARRAY_SIZE(gtiir));
 
        /*
@@ -1677,11 +1681,11 @@ static void reset_irq(struct intel_engine_cs *engine)
         */
        for (i = 0; i < 2; i++) {
                I915_WRITE(GEN8_GT_IIR(gtiir[engine->id]),
-                          GT_CONTEXT_SWITCH_INTERRUPT << engine->irq_shift);
+                          engine->irq_keep_mask);
                POSTING_READ(GEN8_GT_IIR(gtiir[engine->id]));
        }
        GEM_BUG_ON(I915_READ(GEN8_GT_IIR(gtiir[engine->id])) &
-                  (GT_CONTEXT_SWITCH_INTERRUPT << engine->irq_shift));
+                  engine->irq_keep_mask);
 
        clear_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted);
 }