cpufreq: amd-pstate: Write CPPC enable bit per-socket

Currently amd_pstate sets CPPC enable bit in MSR_AMD_CPPC_ENABLE only
for the CPU where the module_init happened. But MSR_AMD_CPPC_ENABLE is
per-socket. This causes CPPC enable bit to set for only one socket for
servers with more than one physical packages. To fix this write
MSR_AMD_CPPC_ENABLE per-socket.

Also, handle duplicate calls for cppc_enable, because it's called from
per-policy/per-core callbacks and can result in duplicate MSR writes.

Before the fix:
amd@amd:~$ sudo rdmsr -a 0xc00102b1 | uniq --count
	192 0
    192 1

After the fix:
amd@amd:~$ sudo rdmsr -a 0xc00102b1 | uniq --count
    384 1

Suggested-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
Signed-off-by: Wyes Karny <wyes.karny@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index ddd346a239e0b55acfaef158cb12ea1a8612f948..50722bfbb34a58db9508adedeacf2469fde1f3ce 100644 (file)
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -63,6 +63,7 @@ static struct cpufreq_driver *current_pstate_driver;
 static struct cpufreq_driver amd_pstate_driver;
 static struct cpufreq_driver amd_pstate_epp_driver;
 static int cppc_state = AMD_PSTATE_DISABLE;
+static bool cppc_enabled;
 
 /*
  * AMD Energy Preference Performance (EPP)
@@ -228,7 +229,28 @@ static int amd_pstate_set_energy_pref_index(struct amd_cpudata *cpudata,
 
 static inline int pstate_enable(bool enable)
 {
-       return wrmsrl_safe(MSR_AMD_CPPC_ENABLE, enable);
+       int ret, cpu;
+       unsigned long logical_proc_id_mask = 0;
+
+       if (enable == cppc_enabled)
+               return 0;
+
+       for_each_present_cpu(cpu) {
+               unsigned long logical_id = topology_logical_die_id(cpu);
+
+               if (test_bit(logical_id, &logical_proc_id_mask))
+                       continue;
+
+               set_bit(logical_id, &logical_proc_id_mask);
+
+               ret = wrmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_ENABLE,
+                               enable);
+               if (ret)
+                       return ret;
+       }
+
+       cppc_enabled = enable;
+       return 0;
 }
 
 static int cppc_enable(bool enable)
@@ -236,6 +258,9 @@ static int cppc_enable(bool enable)
        int cpu, ret = 0;
        struct cppc_perf_ctrls perf_ctrls;
 
+       if (enable == cppc_enabled)
+               return 0;
+
        for_each_present_cpu(cpu) {
                ret = cppc_set_enable(cpu, enable);
                if (ret)
@@ -251,6 +276,7 @@ static int cppc_enable(bool enable)
                }
        }
 
+       cppc_enabled = enable;
        return ret;
 }