#define AST_IO_VGAPDR (0x49)
#define AST_IO_VGAGRI (0x4E)
#define AST_IO_VGACRI (0x54)
-#define AST_IO_INPUT_STATUS1_READ (0x5A)
+#define AST_IO_VGAIR1_R (0x5A)
#define AST_IO_MISC_PORT_READ (0x4C)
#define AST_IO_MM_OFFSET (0x380)
ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]);
/* set AR */
- jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
+ jreg = ast_io_read8(ast, AST_IO_VGAIR1_R);
for (i = 0; i < 20; i++) {
jreg = stdtable->ar[i];
ast_io_write8(ast, AST_IO_VGAARI_W, (u8)i);
ast_io_write8(ast, AST_IO_VGAARI_W, 0x14);
ast_io_write8(ast, AST_IO_VGAARI_W, 0x00);
- jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
+ jreg = ast_io_read8(ast, AST_IO_VGAIR1_R);
ast_io_write8(ast, AST_IO_VGAARI_W, 0x20);
/* Set GR */
u8 vgair1;
do {
- vgair1 = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
+ vgair1 = ast_io_read8(ast, AST_IO_VGAIR1_R);
} while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout));
}