RDMA/hns: Remove unnessary init for cmq reg
authorYixian Liu <liuyixian@huawei.com>
Thu, 8 Aug 2019 14:53:44 +0000 (22:53 +0800)
committerDoug Ledford <dledford@redhat.com>
Mon, 12 Aug 2019 14:45:07 +0000 (10:45 -0400)
There is no need to init the enable bit of cmq.

Signed-off-by: Yixian Liu <liuyixian@huawei.com>
Link: https://lore.kernel.org/r/1565276034-97329-5-git-send-email-oulijun@huawei.com
Signed-off-by: Doug Ledford <dledford@redhat.com>
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
drivers/infiniband/hw/hns/hns_roce_hw_v2.h

index 7cd4b3bd649e0ec3c85d9cc96517ebebe8ba6923..2a30a91a9824331e44bb3d53052db4666d73f689 100644 (file)
@@ -887,8 +887,7 @@ static void hns_roce_cmq_init_regs(struct hns_roce_dev *hr_dev, bool ring_type)
                roce_write(hr_dev, ROCEE_TX_CMQ_BASEADDR_H_REG,
                           upper_32_bits(dma));
                roce_write(hr_dev, ROCEE_TX_CMQ_DEPTH_REG,
-                         (ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S) |
-                          HNS_ROCE_CMQ_ENABLE);
+                          ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S);
                roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, 0);
                roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, 0);
        } else {
@@ -896,8 +895,7 @@ static void hns_roce_cmq_init_regs(struct hns_roce_dev *hr_dev, bool ring_type)
                roce_write(hr_dev, ROCEE_RX_CMQ_BASEADDR_H_REG,
                           upper_32_bits(dma));
                roce_write(hr_dev, ROCEE_RX_CMQ_DEPTH_REG,
-                         (ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S) |
-                          HNS_ROCE_CMQ_ENABLE);
+                          ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S);
                roce_write(hr_dev, ROCEE_RX_CMQ_HEAD_REG, 0);
                roce_write(hr_dev, ROCEE_RX_CMQ_TAIL_REG, 0);
        }
index 478f5a5b7aa1da0481bafe7b915f6c2ccfa9328c..58931b5399f89f385ec8e83ccd1416cf1b2e20f9 100644 (file)
 #define HNS_ROCE_CMD_FLAG_ERR_INTR     BIT(HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT)
 
 #define HNS_ROCE_CMQ_DESC_NUM_S                3
-#define HNS_ROCE_CMQ_EN_B              16
-#define HNS_ROCE_CMQ_ENABLE            BIT(HNS_ROCE_CMQ_EN_B)
 
 #define HNS_ROCE_CMQ_SCC_CLR_DONE_CNT          5