misc: rtsx: Remove rtsx_pci_read/write_config() wrappers
authorBjorn Helgaas <bhelgaas@google.com>
Tue, 21 Jul 2020 21:23:34 +0000 (16:23 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 22 Jul 2020 11:29:44 +0000 (13:29 +0200)
rtsx_pci_read_config_dword() and similar wrappers around the PCI config
accessors add very little value, and they obscure the fact that often we
are accessing standard PCI registers that should be coordinated with the
PCI core.

Remove the wrappers and use the PCI config accessors directly.  No
functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200721212336.1159079-4-helgaas@kernel.org
[ fixed up some other instances as original patch was based on old tree - gregkh
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/misc/cardreader/rtl8411.c
drivers/misc/cardreader/rts5209.c
drivers/misc/cardreader/rts5227.c
drivers/misc/cardreader/rts5228.c
drivers/misc/cardreader/rts5229.c
drivers/misc/cardreader/rts5249.c
drivers/misc/cardreader/rts5260.c
drivers/misc/cardreader/rts5261.c
drivers/misc/cardreader/rtsx_pcr.c
include/linux/rtsx_pci.h

index 489ebe9076881f678fae81639dd08caa87f8933f..a07674ed0596512461b562fdcbc3947a7c3ead6b 100644 (file)
@@ -37,10 +37,11 @@ static int rtl8411b_is_qfn48(struct rtsx_pcr *pcr)
 
 static void rtl8411_fetch_vendor_settings(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
        u32 reg1 = 0;
        u8 reg3 = 0;
 
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg1);
+       pci_read_config_dword(pdev, PCR_SETTING_REG1, &reg1);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg1);
 
        if (!rtsx_vendor_setting_valid(reg1))
@@ -52,16 +53,17 @@ static void rtl8411_fetch_vendor_settings(struct rtsx_pcr *pcr)
        pcr->card_drive_sel &= 0x3F;
        pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg1);
 
-       rtsx_pci_read_config_byte(pcr, PCR_SETTING_REG3, &reg3);
+       pci_read_config_byte(pdev, PCR_SETTING_REG3, &reg3);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG3, reg3);
        pcr->sd30_drive_sel_3v3 = rtl8411_reg_to_sd30_drive_sel_3v3(reg3);
 }
 
 static void rtl8411b_fetch_vendor_settings(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
        u32 reg = 0;
 
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG1, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
 
        if (!rtsx_vendor_setting_valid(reg))
index 659056164b21667d66954e4f14cfb4e7c2be1ce5..39a6a7ecc32e9815b416b26db8c8fed9a5ce525e 100644 (file)
@@ -23,9 +23,10 @@ static u8 rts5209_get_ic_version(struct rtsx_pcr *pcr)
 
 static void rts5209_fetch_vendor_settings(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
        u32 reg;
 
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG1, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
 
        if (rts5209_vendor_setting1_valid(reg)) {
@@ -34,7 +35,7 @@ static void rts5209_fetch_vendor_settings(struct rtsx_pcr *pcr)
                pcr->aspm_en = rts5209_reg_to_aspm(reg);
        }
 
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG2, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
 
        if (rts5209_vendor_setting2_valid(reg)) {
index 3a9467aaa4356c5f4a6c7dd26429f9e8129c2d22..f5f392ddf3d67bc11fe8aee9a5c3eaeaf29010b7 100644 (file)
@@ -56,9 +56,10 @@ static void rts5227_fill_driving(struct rtsx_pcr *pcr, u8 voltage)
 
 static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
        u32 reg;
 
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG1, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
 
        if (!rtsx_vendor_setting_valid(reg))
@@ -69,7 +70,7 @@ static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr)
        pcr->card_drive_sel &= 0x3F;
        pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
 
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG2, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
        pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg);
        if (rtsx_reg_check_reverse_socket(reg))
index 99aff7cd0a93b871b9c5e0ae0c9c0d6f2f3f4169..448929829de4e172bf9afe052627012f7ec5ad80 100644 (file)
@@ -60,9 +60,11 @@ static void rts5228_fill_driving(struct rtsx_pcr *pcr, u8 voltage)
 
 static void rtsx5228_fetch_vendor_settings(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
        u32 reg;
+
        /* 0x724~0x727 */
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG1, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
 
        if (!rtsx_vendor_setting_valid(reg)) {
@@ -73,7 +75,7 @@ static void rtsx5228_fetch_vendor_settings(struct rtsx_pcr *pcr)
        pcr->aspm_en = rtsx_reg_to_aspm(reg);
 
        /* 0x814~0x817 */
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG2, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
 
        pcr->rtd3_en = rtsx_reg_to_rtd3(reg);
@@ -380,7 +382,7 @@ static void rts5228_init_from_cfg(struct rtsx_pcr *pcr)
        u32 lval;
        struct rtsx_cr_option *option = &pcr->option;
 
-       rtsx_pci_read_config_dword(pcr, PCR_ASPM_SETTING_REG1, &lval);
+       pci_read_config_dword(pcr->pci, PCR_ASPM_SETTING_REG1, &lval);
 
 
        if (0 == (lval & 0x0F))
index 9f080a32ef50c7d939de0ab0f61cb77cf89cc6e5..89e6f124ca5ca068e94219db9f2e58901ae7adcc 100644 (file)
@@ -23,9 +23,10 @@ static u8 rts5229_get_ic_version(struct rtsx_pcr *pcr)
 
 static void rts5229_fetch_vendor_settings(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
        u32 reg;
 
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG1, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
 
        if (!rtsx_vendor_setting_valid(reg))
@@ -37,7 +38,7 @@ static void rts5229_fetch_vendor_settings(struct rtsx_pcr *pcr)
        pcr->card_drive_sel &= 0x3F;
        pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
 
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG2, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
        pcr->sd30_drive_sel_3v3 =
                map_sd_drive(rtsx_reg_to_sd30_drive_sel_3v3(reg));
index 6c6c9e95a29f9c94b37c969fd74dadd6906ca167..665472d05993979eac72331c29d852f5e7177843 100644 (file)
@@ -55,9 +55,10 @@ static void rts5249_fill_driving(struct rtsx_pcr *pcr, u8 voltage)
 
 static void rtsx_base_fetch_vendor_settings(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
        u32 reg;
 
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG1, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
 
        if (!rtsx_vendor_setting_valid(reg)) {
@@ -70,7 +71,7 @@ static void rtsx_base_fetch_vendor_settings(struct rtsx_pcr *pcr)
        pcr->card_drive_sel &= 0x3F;
        pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
 
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG2, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
        pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg);
        if (rtsx_reg_check_reverse_socket(reg))
@@ -93,14 +94,15 @@ static void rtsx_base_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)
 
 static void rts5249_init_from_cfg(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
        struct rtsx_cr_option *option = &(pcr->option);
        u32 lval;
 
        if (CHK_PCI_PID(pcr, PID_524A))
-               rtsx_pci_read_config_dword(pcr,
+               pci_read_config_dword(pdev,
                        PCR_ASPM_SETTING_REG1, &lval);
        else
-               rtsx_pci_read_config_dword(pcr,
+               pci_read_config_dword(pdev,
                        PCR_ASPM_SETTING_REG2, &lval);
 
        if (lval & ASPM_L1_1_EN_MASK)
@@ -118,7 +120,7 @@ static void rts5249_init_from_cfg(struct rtsx_pcr *pcr)
        if (option->ltr_en) {
                u16 val;
 
-               pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &val);
+               pcie_capability_read_word(pdev, PCI_EXP_DEVCTL2, &val);
                if (val & PCI_EXP_DEVCTL2_LTR_EN) {
                        option->ltr_enabled = true;
                        option->ltr_active = true;
index 7a9dbb778e84a1a2cbd58ee12927ccd54f906606..0e806dd7ad087981053116845a5b89be06ae6ed8 100644 (file)
@@ -64,9 +64,10 @@ static void rts5260_fill_driving(struct rtsx_pcr *pcr, u8 voltage)
 
 static void rtsx_base_fetch_vendor_settings(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
        u32 reg;
 
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG1, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
 
        if (!rtsx_vendor_setting_valid(reg)) {
@@ -79,7 +80,7 @@ static void rtsx_base_fetch_vendor_settings(struct rtsx_pcr *pcr)
        pcr->card_drive_sel &= 0x3F;
        pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
 
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG2, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
        pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg);
        if (rtsx_reg_check_reverse_socket(reg))
@@ -496,10 +497,11 @@ static void rts5260_pwr_saving_setting(struct rtsx_pcr *pcr)
 
 static void rts5260_init_from_cfg(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
        struct rtsx_cr_option *option = &pcr->option;
        u32 lval;
 
-       rtsx_pci_read_config_dword(pcr, PCR_ASPM_SETTING_5260, &lval);
+       pci_read_config_dword(pdev, PCR_ASPM_SETTING_5260, &lval);
 
        if (lval & ASPM_L1_1_EN_MASK)
                rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
@@ -518,7 +520,7 @@ static void rts5260_init_from_cfg(struct rtsx_pcr *pcr)
        if (option->ltr_en) {
                u16 val;
 
-               pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &val);
+               pcie_capability_read_word(pdev, PCI_EXP_DEVCTL2, &val);
                if (val & PCI_EXP_DEVCTL2_LTR_EN) {
                        option->ltr_enabled = true;
                        option->ltr_active = true;
index 195822ec858ed006c801dedb8aae7d915c74f9c1..4f30637ee4ac9fce13489ed480c6d5f6cfcc43d7 100644 (file)
@@ -59,9 +59,11 @@ static void rts5261_fill_driving(struct rtsx_pcr *pcr, u8 voltage)
 
 static void rtsx5261_fetch_vendor_settings(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
        u32 reg;
+
        /* 0x814~0x817 */
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG2, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
 
        if (!rts5261_vendor_setting_valid(reg)) {
@@ -76,7 +78,7 @@ static void rtsx5261_fetch_vendor_settings(struct rtsx_pcr *pcr)
                pcr->flags |= PCR_REVERSE_SOCKET;
 
        /* 0x724~0x727 */
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
+       pci_read_config_dword(pdev, PCR_SETTING_REG1, &reg);
        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
 
        pcr->aspm_en = rts5261_reg_to_aspm(reg);
@@ -361,6 +363,7 @@ static void rts5261_process_ocp(struct rtsx_pcr *pcr)
 
 static int rts5261_init_from_hw(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
        int retval;
        u32 lval, i;
        u8 valid, efuse_valid, tmp;
@@ -386,8 +389,7 @@ static int rts5261_init_from_hw(struct rtsx_pcr *pcr)
        pcr_dbg(pcr, "Load efuse valid: 0x%x\n", efuse_valid);
 
        if (efuse_valid == 0) {
-               retval = rtsx_pci_read_config_dword(pcr,
-                       PCR_SETTING_REG2, &lval);
+               retval = pci_read_config_dword(pdev, PCR_SETTING_REG2, &lval);
                if (retval != 0)
                        pcr_dbg(pcr, "read 0x814 DW fail\n");
                pcr_dbg(pcr, "DW from 0x814: 0x%x\n", lval);
@@ -399,9 +401,9 @@ static int rts5261_init_from_hw(struct rtsx_pcr *pcr)
                REG_EFUSE_POR, 0);
        pcr_dbg(pcr, "Disable efuse por!\n");
 
-       rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &lval);
+       pci_read_config_dword(pdev, PCR_SETTING_REG2, &lval);
        lval = lval & 0x00FFFFFF;
-       retval = rtsx_pci_write_config_dword(pcr, PCR_SETTING_REG2, lval);
+       retval = pci_write_config_dword(pdev, PCR_SETTING_REG2, lval);
        if (retval != 0)
                pcr_dbg(pcr, "write config fail\n");
 
@@ -410,10 +412,11 @@ static int rts5261_init_from_hw(struct rtsx_pcr *pcr)
 
 static void rts5261_init_from_cfg(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
        u32 lval;
        struct rtsx_cr_option *option = &pcr->option;
 
-       rtsx_pci_read_config_dword(pcr, PCR_ASPM_SETTING_REG1, &lval);
+       pci_read_config_dword(pdev, PCR_ASPM_SETTING_REG1, &lval);
 
        if (lval & ASPM_L1_1_EN_MASK)
                rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
@@ -439,7 +442,7 @@ static void rts5261_init_from_cfg(struct rtsx_pcr *pcr)
        if (option->ltr_en) {
                u16 val;
 
-               pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &val);
+               pcie_capability_read_word(pdev, PCI_EXP_DEVCTL2, &val);
                if (val & PCI_EXP_DEVCTL2_LTR_EN) {
                        option->ltr_enabled = true;
                        option->ltr_active = true;
index 0c0f1dd6f00ff3ec80d53429ff5c0dab23c920fb..2fc6b938e9994255b28367c4012fba5308a593ee 100644 (file)
@@ -1350,7 +1350,7 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr)
        pcie_capability_write_word(pdev, PCI_EXP_LNKCTL,
                                   PCI_EXP_LNKCTL_CLKREQ_EN);
        /* Enter L1 when host tx idle */
-       rtsx_pci_write_config_byte(pcr, 0x70F, 0x5B);
+       pci_write_config_byte(pdev, 0x70F, 0x5B);
 
        if (pcr->ops->extra_init_hw) {
                err = pcr->ops->extra_init_hw(pcr);
index 4ff7b221f36ea6b1e295f2d2f2d96f86ef5ec846..b93573c3c5fc87e4da951fe2e3032b8219b8e747 100644 (file)
 #define rtsx_pci_readb(pcr, reg) \
        ioread8((pcr)->remap_addr + reg)
 
-#define rtsx_pci_read_config_byte(pcr, where, val) \
-       pci_read_config_byte((pcr)->pci, where, val)
-
-#define rtsx_pci_write_config_byte(pcr, where, val) \
-       pci_write_config_byte((pcr)->pci, where, val)
-
-#define rtsx_pci_read_config_dword(pcr, where, val) \
-       pci_read_config_dword((pcr)->pci, where, val)
-
-#define rtsx_pci_write_config_dword(pcr, where, val) \
-       pci_write_config_dword((pcr)->pci, where, val)
-
 #define STATE_TRANS_NONE               0
 #define STATE_TRANS_CMD                        1
 #define STATE_TRANS_BUF                        2