clk: rockchip: Optimize PLL table memory usage

Before the change: The sizeof rk3568_pll_rates = 2544
Use union: The sizeof rk3568_pll_rates = 1696

In future Soc, more PLL types will be added, and the
rockchip_pll_rate_table will add more members,
and the space savings will be even more pronounced
by using union.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Link: https://lore.kernel.org/r/20210511090726.15146-1-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 571cee7bbfdc1fba37dde037a860d4bc160eb0f8..7aa45cc70287ad1ec91c38aeca26981ea029b246 100644 (file)
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -271,17 +271,24 @@ struct rockchip_clk_provider {
 
 struct rockchip_pll_rate_table {
        unsigned long rate;
-       unsigned int nr;
-       unsigned int nf;
-       unsigned int no;
-       unsigned int nb;
-       /* for RK3036/RK3399 */
-       unsigned int fbdiv;
-       unsigned int postdiv1;
-       unsigned int refdiv;
-       unsigned int postdiv2;
-       unsigned int dsmpd;
-       unsigned int frac;
+       union {
+               struct {
+                       /* for RK3066 */
+                       unsigned int nr;
+                       unsigned int nf;
+                       unsigned int no;
+                       unsigned int nb;
+               };
+               struct {
+                       /* for RK3036/RK3399 */
+                       unsigned int fbdiv;
+                       unsigned int postdiv1;
+                       unsigned int refdiv;
+                       unsigned int postdiv2;
+                       unsigned int dsmpd;
+                       unsigned int frac;
+               };
+       };
 };
 
 /**