clk: qcom: gcc-qcs404: add support for GDSCs

Add support for two GDSCs provided by this clock controller.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226042154.2666748-13-dmitry.baryshkov@linaro.org

diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
index fa2adf242648fecd00f53dee0298d4bf10b8abd5..5f58dd82d3fe645d022cb55476e2ee70b629522a 100644 (file)
--- a/drivers/clk/qcom/gcc-qcs404.c
+++ b/drivers/clk/qcom/gcc-qcs404.c
@@ -19,6 +19,7 @@
 #include "clk-rcg.h"
 #include "clk-regmap.h"
 #include "common.h"
+#include "gdsc.h"
 #include "reset.h"
 
 enum {
@@ -2591,6 +2592,22 @@ static struct clk_branch gcc_wdsp_q6ss_axim_clk = {
        },
 };
 
+static struct gdsc mdss_gdsc = {
+       .gdscr = 0x4d078,
+       .pd = {
+               .name = "mdss",
+       },
+       .pwrsts = PWRSTS_OFF_ON,
+};
+
+static struct gdsc oxili_gdsc = {
+       .gdscr = 0x5901c,
+       .pd = {
+               .name = "oxili",
+       },
+       .pwrsts = PWRSTS_OFF_ON,
+};
+
 static struct clk_hw *gcc_qcs404_hws[] = {
        &cxo.hw,
 };
@@ -2741,6 +2758,11 @@ static struct clk_regmap *gcc_qcs404_clocks[] = {
 
 };
 
+static struct gdsc *gcc_qcs404_gdscs[] = {
+       [MDSS_GDSC] = &mdss_gdsc,
+       [OXILI_GDSC] = &oxili_gdsc,
+};
+
 static const struct qcom_reset_map gcc_qcs404_resets[] = {
        [GCC_GENI_IR_BCR] = { 0x0F000 },
        [GCC_CDSP_RESTART] = { 0x18000 },
@@ -2783,6 +2805,8 @@ static const struct qcom_cc_desc gcc_qcs404_desc = {
        .num_resets = ARRAY_SIZE(gcc_qcs404_resets),
        .clk_hws = gcc_qcs404_hws,
        .num_clk_hws = ARRAY_SIZE(gcc_qcs404_hws),
+       .gdscs = gcc_qcs404_gdscs,
+       .num_gdscs = ARRAY_SIZE(gcc_qcs404_gdscs),
 };
 
 static const struct of_device_id gcc_qcs404_match_table[] = {