uint32_t param1;
 };
 
+static inline const char *yesno(bool v)
+{
+       return v ? "yes" : "no";
+}
 
 /* parse_write_buffer_into_params - Helper function to parse debugfs write buffer into an array
  *
        return read_size - r;
 }
 
+/* function: Read link's DSC & FEC capabilities
+ *
+ *
+ * Access it with the following command (you need to specify
+ * connector like DP-1):
+ *
+ *     cat /sys/kernel/debug/dri/0/DP-X/dp_dsc_fec_support
+ *
+ */
+static int dp_dsc_fec_support_show(struct seq_file *m, void *data)
+{
+       struct drm_connector *connector = m->private;
+       struct drm_modeset_acquire_ctx ctx;
+       struct drm_device *dev = connector->dev;
+       struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
+       int ret = 0;
+       bool try_again = false;
+       bool is_fec_supported = false;
+       bool is_dsc_supported = false;
+       struct dpcd_caps dpcd_caps;
+
+       drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
+       do {
+               try_again = false;
+               ret = drm_modeset_lock(&dev->mode_config.connection_mutex, &ctx);
+               if (ret) {
+                       if (ret == -EDEADLK) {
+                               ret = drm_modeset_backoff(&ctx);
+                               if (!ret) {
+                                       try_again = true;
+                                       continue;
+                               }
+                       }
+                       break;
+               }
+               if (connector->status != connector_status_connected) {
+                       ret = -ENODEV;
+                       break;
+               }
+               dpcd_caps = aconnector->dc_link->dpcd_caps;
+               if (aconnector->port) {
+                       /* aconnector sets dsc_aux during get_modes call
+                        * if MST connector has it means it can either
+                        * enable DSC on the sink device or on MST branch
+                        * its connected to.
+                        */
+                       if (aconnector->dsc_aux) {
+                               is_fec_supported = true;
+                               is_dsc_supported = true;
+                       }
+               } else {
+                       is_fec_supported = dpcd_caps.fec_cap.raw & 0x1;
+                       is_dsc_supported = dpcd_caps.dsc_caps.dsc_basic_caps.raw[0] & 0x1;
+               }
+       } while (try_again);
+
+       drm_modeset_drop_locks(&ctx);
+       drm_modeset_acquire_fini(&ctx);
+
+       seq_printf(m, "FEC_Sink_Support: %s\n", yesno(is_fec_supported));
+       seq_printf(m, "DSC_Sink_Support: %s\n", yesno(is_dsc_supported));
+
+       return ret;
+}
+
 /* function: read DSC status on the connector
  *
  * The read function: dp_dsc_clock_en_read
        return result;
 }
 
+DEFINE_SHOW_ATTRIBUTE(dp_dsc_fec_support);
 DEFINE_SHOW_ATTRIBUTE(dmub_fw_state);
 DEFINE_SHOW_ATTRIBUTE(dmub_tracebuffer);
 DEFINE_SHOW_ATTRIBUTE(output_bpc);
                {"dsc_pic_width", &dp_dsc_pic_width_debugfs_fops},
                {"dsc_pic_height", &dp_dsc_pic_height_debugfs_fops},
                {"dsc_chunk_size", &dp_dsc_chunk_size_debugfs_fops},
-               {"dsc_slice_bpg", &dp_dsc_slice_bpg_offset_debugfs_fops}
+               {"dsc_slice_bpg", &dp_dsc_slice_bpg_offset_debugfs_fops},
+               {"dp_dsc_fec_support", &dp_dsc_fec_support_fops}
 };
 
 #ifdef CONFIG_DRM_AMD_DC_HDCP