The pl330 can be behind an IOMMU which is the case for Arm Juno board.
Add the 'iommus' property allowing for 1 IOMMU entry per channel for
writes and 1 IOMMU entry for reads.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220801210237.1501488-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dma-coherent: true
+ iommus:
+ minItems: 1
+ maxItems: 9
+ description: Up to 1 IOMMU entry per DMA channel for writes and 1
+ IOMMU entry for reads.
+
power-domains:
maxItems: 1