static inline unsigned in_reg(IVState *s, enum Reg reg)
{
const char *name = reg2str(reg);
- QTestState *qtest = global_qtest;
unsigned res;
- global_qtest = s->qs->qts;
res = qpci_io_readl(s->dev, s->reg_bar, reg);
g_test_message("*%s -> %x\n", name, res);
- global_qtest = qtest;
return res;
}
static inline void out_reg(IVState *s, enum Reg reg, unsigned v)
{
const char *name = reg2str(reg);
- QTestState *qtest = global_qtest;
- global_qtest = s->qs->qts;
g_test_message("%x -> *%s\n", v, name);
qpci_io_writel(s->dev, s->reg_bar, reg, v);
- global_qtest = qtest;
}
static inline void read_mem(IVState *s, uint64_t off, void *buf, size_t len)
{
- QTestState *qtest = global_qtest;
-
- global_qtest = s->qs->qts;
qpci_memread(s->dev, s->mem_bar, off, buf, len);
- global_qtest = qtest;
}
static inline void write_mem(IVState *s, uint64_t off,
const void *buf, size_t len)
{
- QTestState *qtest = global_qtest;
-
- global_qtest = s->qs->qts;
qpci_memwrite(s->dev, s->mem_bar, off, buf, len);
- global_qtest = qtest;
}
static void cleanup_vm(IVState *s)
{
+ assert(!global_qtest);
g_free(s->dev);
qtest_shutdown(s->qs);
}
g_printerr("ivshmem-test tests are only available on x86 or ppc64\n");
exit(EXIT_FAILURE);
}
- global_qtest = s->qs->qts;
s->dev = get_device(s->qs->pcibus);
s->reg_bar = qpci_iomap(s->dev, 0, &barsize);
g_assert_cmpint(vm1, !=, vm2);
/* check number of MSI-X vectors */
- global_qtest = s1->qs->qts;
if (msi) {
ret = qpci_msix_table_size(s1->dev);
g_assert_cmpuint(ret, ==, nvectors);
g_assert_cmpuint(ret, !=, 0);
/* ping vm1 -> vm2 on vector 1 */
- global_qtest = s2->qs->qts;
if (msi) {
ret = qpci_msix_pending(s2->dev, 1);
g_assert_cmpuint(ret, ==, 0);