drm/xe/pvc: Blacklist BCS_SWCTRL register
authorNiranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Thu, 17 Aug 2023 09:20:44 +0000 (09:20 +0000)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 21 Dec 2023 16:40:27 +0000 (11:40 -0500)
Wa_16017236439 requires the BCS_SWCTRL to be privileged.

v2: Define and use BCS_SWCTRL()

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/regs/xe_engine_regs.h
drivers/gpu/drm/xe/xe_reg_whitelist.c

index d57fd855086ac32c09acb7f5f6567742964cf9f4..1a366d8070f39ac78d985543ab2f091bc7ae565d 100644 (file)
@@ -63,6 +63,8 @@
 #define RING_BBADDR(base)                      XE_REG((base) + 0x140)
 #define RING_BBADDR_UDW(base)                  XE_REG((base) + 0x168)
 
+#define BCS_SWCTRL(base)                       XE_REG((base) + 0x200, XE_REG_OPTION_MASKED)
+
 /* Handling MOCS value in BLIT_CCTL like it was done CMD_CCTL */
 #define BLIT_CCTL(base)                                XE_REG((base) + 0x204)
 #define   BLIT_CCTL_DST_MOCS_MASK              REG_GENMASK(14, 9)
index e83781f9a516b8640b2dacfd45691c0218637459..e66ae1bdaf9c04ddbb42f51a25290771043c02a2 100644 (file)
@@ -50,6 +50,12 @@ static const struct xe_rtp_entry_sr register_whitelist[] = {
                                   RING_FORCE_TO_NONPRIV_DENY |
                                   RING_FORCE_TO_NONPRIV_RANGE_64))
        },
+       { XE_RTP_NAME("16017236439"),
+         XE_RTP_RULES(PLATFORM(PVC), ENGINE_CLASS(COPY)),
+         XE_RTP_ACTIONS(WHITELIST(BCS_SWCTRL(0),
+                                  RING_FORCE_TO_NONPRIV_DENY,
+                                  XE_RTP_ACTION_FLAG(ENGINE_BASE)))
+       },
        {}
 };