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accel/tcg: Fix tlb_set_page_with_attrs, tlb_set_page
author
Richard Henderson
<richard.henderson@linaro.org>
Wed, 5 Feb 2025 02:51:30 +0000
(18:51 -0800)
committer
Richard Henderson
<richard.henderson@linaro.org>
Tue, 18 Feb 2025 15:33:42 +0000
(07:33 -0800)
The declarations use vaddr for size.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
accel/tcg/cputlb.c
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diff --git
a/accel/tcg/cputlb.c
b/accel/tcg/cputlb.c
index 17e225169516397c82b9259d0a701ff8563ea043..75d075d044927e8cd894c8c280ce28ee778af877 100644
(file)
--- a/
accel/tcg/cputlb.c
+++ b/
accel/tcg/cputlb.c
@@
-1193,7
+1193,7
@@
void tlb_set_page_full(CPUState *cpu, int mmu_idx,
void tlb_set_page_with_attrs(CPUState *cpu, vaddr addr,
hwaddr paddr, MemTxAttrs attrs, int prot,
- int mmu_idx,
uint64_t
size)
+ int mmu_idx,
vaddr
size)
{
CPUTLBEntryFull full = {
.phys_addr = paddr,
@@
-1208,7
+1208,7
@@
void tlb_set_page_with_attrs(CPUState *cpu, vaddr addr,
void tlb_set_page(CPUState *cpu, vaddr addr,
hwaddr paddr, int prot,
- int mmu_idx,
uint64_t
size)
+ int mmu_idx,
vaddr
size)
{
tlb_set_page_with_attrs(cpu, addr, paddr, MEMTXATTRS_UNSPECIFIED,
prot, mmu_idx, size);