iowrite32(RX_PERPKT, priv->port_offset + MAC_REG_RXDMACTL0);
        iowrite32(RX_PERPKT, priv->port_offset + MAC_REG_RXDMACTL1);
        /* set MAC RD pointer */
-       MACvSetCurrRx0DescAddr(priv, priv->rd0_pool_dma);
+       vt6655_mac_set_curr_rx_0_desc_addr(priv, priv->rd0_pool_dma);
 
        MACvSetCurrRx1DescAddr(priv, priv->rd1_pool_dma);
 }
 
  * Return Value: none
  *
  */
-void MACvSetCurrRx0DescAddr(struct vnt_private *priv, u32 curr_desc_addr)
+void vt6655_mac_set_curr_rx_0_desc_addr(struct vnt_private *priv, u32 curr_desc_addr)
 {
        void __iomem *io_base = priv->port_offset;
        unsigned short ww;
 
 bool MACbSoftwareReset(struct vnt_private *priv);
 bool MACbShutdown(struct vnt_private *priv);
 void MACvInitialize(struct vnt_private *priv);
-void MACvSetCurrRx0DescAddr(struct vnt_private *priv,
-                           u32 curr_desc_addr);
+void vt6655_mac_set_curr_rx_0_desc_addr(struct vnt_private *priv, u32 curr_desc_addr);
 void MACvSetCurrRx1DescAddr(struct vnt_private *priv,
                            u32 curr_desc_addr);
 void MACvSetCurrTXDescAddr(int iTxType, struct vnt_private *priv,