drm/i915/dsb: Use non-posted register writes for legacy LUT

The DSB has problems writing the legacy LUT. The two workarounds
I've discoverted are:
- write each entry twice back to back
- use non-posted writes

Let's use non-posted writes as that seems a bit more standard.

TODO: measure which is faster

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230606191504.18099-14-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 7da79ffeb77bff5cceb3161470b0a1deff0765b4..9f80228f96cb7910b37a202248bd4a99611d7e0e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1329,9 +1329,20 @@ static void ilk_load_lut_8(const struct intel_crtc_state *crtc_state,
 
        lut = blob->data;
 
+       /*
+        * DSB fails to correctly load the legacy LUT
+        * unless we either write each entry twice,
+        * or use non-posted writes
+        */
+       if (crtc_state->dsb)
+               intel_dsb_nonpost_start(crtc_state->dsb);
+
        for (i = 0; i < 256; i++)
                ilk_lut_write(crtc_state, LGC_PALETTE(pipe, i),
                              i9xx_lut_8(&lut[i]));
+
+       if (crtc_state->dsb)
+               intel_dsb_nonpost_end(crtc_state->dsb);
 }
 
 static void ilk_load_lut_10(const struct intel_crtc_state *crtc_state,