projects
/
qemu.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
b3df30a
)
cpu/arm11mpcore: Set number of GIC priority bits to 4
author
Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com>
Mon, 24 Feb 2020 09:39:24 +0000
(15:09 +0530)
committer
Peter Maydell
<peter.maydell@linaro.org>
Fri, 28 Feb 2020 16:14:57 +0000
(16:14 +0000)
The GIC built into the ARM11MPCore is always implemented with 4
priority bits; set the GIC property accordingly.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id:
1582537164
-764-4-git-send-email-sai.pavan.boddu@xilinx.com
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: tweaked commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/cpu/arm11mpcore.c
patch
|
blob
|
history
diff --git
a/hw/cpu/arm11mpcore.c
b/hw/cpu/arm11mpcore.c
index 2e3e87cc1b32991274523c41547bfe57aa07a870..ab9fadb67cbc57d67e70dc0c8e673d199043bc56 100644
(file)
--- a/
hw/cpu/arm11mpcore.c
+++ b/
hw/cpu/arm11mpcore.c
@@
-15,6
+15,7
@@
#include "hw/irq.h"
#include "hw/qdev-properties.h"
+#define ARM11MPCORE_NUM_GIC_PRIORITY_BITS 4
static void mpcore_priv_set_irq(void *opaque, int irq, int level)
{
@@
-86,6
+87,10
@@
static void mpcore_priv_realize(DeviceState *dev, Error **errp)
qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu);
qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq);
+ qdev_prop_set_uint32(gicdev, "num-priority-bits",
+ ARM11MPCORE_NUM_GIC_PRIORITY_BITS);
+
+
object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
if (err != NULL) {
error_propagate(errp, err);