arm64: dts: mediatek: mt8186: Add GPU speed bin NVMEM cells

On the MT8186, the chip is binned for different GPU voltages at the
highest OPPs. The binning value is stored in the efuse.

Add the NVMEM cell, and tie it to the GPU.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230609072906.2784594-4-wenst@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index e2becf2fe79f930dc5e67130d81580dc152d2b2d..3762a70ccafb8e42f4e478992f26a6149c73ce8d 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -1519,6 +1519,11 @@
                        reg = <0 0x11cb0000 0 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <1>;
+
+                       gpu_speedbin: gpu-speed-bin@59c {
+                               reg = <0x59c 0x4>;
+                               bits = <0 3>;
+                       };
                };
 
                mipi_tx0: dsi-phy@11cc0000 {
@@ -1551,6 +1556,8 @@
                                        <&spm MT8186_POWER_DOMAIN_MFG3>;
                        power-domain-names = "core0", "core1";
                        #cooling-cells = <2>;
+                       nvmem-cells = <&gpu_speedbin>;
+                       nvmem-cell-names = "speed-bin";
                        status = "disabled";
                };