drm/i915: Setup the RCS ring prior to execution
authorChris Wilson <chris@chris-wilson.co.uk>
Thu, 18 Apr 2019 13:27:20 +0000 (14:27 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 18 Apr 2019 16:33:49 +0000 (17:33 +0100)
We need to set the various ring registers prior to restarting the
engine, or else we may restart it after reset/resume in an ill-defined
state.

Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190418132720.3716-2-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/intel_ringbuffer.c

index 00bd9eeb053db8a797b74ac15face528f1b21f6b..3844581f622c0cda2be4f3f4c9a847737ad61468 100644 (file)
@@ -831,9 +831,6 @@ static int intel_rcs_ctx_init(struct i915_request *rq)
 static int init_render_ring(struct intel_engine_cs *engine)
 {
        struct drm_i915_private *dev_priv = engine->i915;
-       int ret = init_ring_common(engine);
-       if (ret)
-               return ret;
 
        /* WaTimedSingleVertexDispatch:cl,bw,ctg,elk,ilk,snb */
        if (IS_GEN_RANGE(dev_priv, 4, 6))
@@ -873,7 +870,7 @@ static int init_render_ring(struct intel_engine_cs *engine)
        if (IS_GEN_RANGE(dev_priv, 6, 7))
                I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
 
-       return 0;
+       return init_ring_common(engine);
 }
 
 static void cancel_requests(struct intel_engine_cs *engine)