dmaengine: xilinx: xdma: Fix the count of elapsed periods in cyclic mode
authorMiquel Raynal <miquel.raynal@bootlin.com>
Thu, 30 Nov 2023 11:13:12 +0000 (12:13 +0100)
committerVinod Koul <vkoul@kernel.org>
Thu, 21 Dec 2023 16:21:27 +0000 (21:51 +0530)
Xilinx DMA engine is capable of keeping track of the number of elapsed
periods and this is an increasing 32-bit counter which is only reset
when turning off the engine. No need to add this value to our local
counter.

Fixes: cd8c732ce1a5 ("dmaengine: xilinx: xdma: Support cyclic transfers")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20231130111315.729430-2-miquel.raynal@bootlin.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/xilinx/xdma.c

index 84a88029226fdc16e423d8162408eea40cc22d00..2c9c72d4b5a200f365d1c44a10065e6dca1db858 100644 (file)
@@ -754,9 +754,9 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_id)
        if (ret)
                goto out;
 
-       desc->completed_desc_num += complete_desc_num;
-
        if (desc->cyclic) {
+               desc->completed_desc_num = complete_desc_num;
+
                ret = regmap_read(xdev->rmap, xchan->base + XDMA_CHAN_STATUS,
                                  &st);
                if (ret)
@@ -768,6 +768,8 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_id)
                goto out;
        }
 
+       desc->completed_desc_num += complete_desc_num;
+
        /*
         * if all data blocks are transferred, remove and complete the request
         */