Xilinx DMA engine is capable of keeping track of the number of elapsed
periods and this is an increasing 32-bit counter which is only reset
when turning off the engine. No need to add this value to our local
counter.
Fixes: cd8c732ce1a5 ("dmaengine: xilinx: xdma: Support cyclic transfers")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20231130111315.729430-2-miquel.raynal@bootlin.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
if (ret)
goto out;
- desc->completed_desc_num += complete_desc_num;
-
if (desc->cyclic) {
+ desc->completed_desc_num = complete_desc_num;
+
ret = regmap_read(xdev->rmap, xchan->base + XDMA_CHAN_STATUS,
&st);
if (ret)
goto out;
}
+ desc->completed_desc_num += complete_desc_num;
+
/*
* if all data blocks are transferred, remove and complete the request
*/