spi: bcm2835: implement ctlr->max_transfer_size
authorDavid Lechner <dlechner@baylibre.com>
Fri, 26 Jan 2024 22:00:23 +0000 (16:00 -0600)
committerMark Brown <broonie@kernel.org>
Mon, 5 Feb 2024 14:35:44 +0000 (14:35 +0000)
The core SPI code will handle splitting transfers if needed as long
as ctlr->max_transfer_size is implemented. It does this in
__spi_pump_transfer_message() immediately before calling
ctlr->prepare_message. So effectively, this change does not
alter the behavior of the driver.

Also, several peripheral drivers make use of spi_max_transfer_size(),
so this should improve compatibility with those drivers.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Link: https://lore.kernel.org/r/20240126220024.3926403-2-dlechner@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-bcm2835.c

index e709887eb2a967ae3e65533b120ff15fa2976c8e..e1b9b12357877fea810336fa687eed6654ee4f05 100644 (file)
@@ -1117,19 +1117,6 @@ static int bcm2835_spi_prepare_message(struct spi_controller *ctlr,
        struct spi_device *spi = msg->spi;
        struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
        struct bcm2835_spidev *target = spi_get_ctldata(spi);
-       int ret;
-
-       if (ctlr->can_dma) {
-               /*
-                * DMA transfers are limited to 16 bit (0 to 65535 bytes) by
-                * the SPI HW due to DLEN. Split up transfers (32-bit FIFO
-                * aligned) if the limit is exceeded.
-                */
-               ret = spi_split_transfers_maxsize(ctlr, msg, 65532,
-                                                 GFP_KERNEL | GFP_DMA);
-               if (ret)
-                       return ret;
-       }
 
        /*
         * Set up clock polarity before spi_transfer_one_message() asserts
@@ -1219,6 +1206,19 @@ static int bcm2835_spi_setup_dma(struct spi_controller *ctlr,
        return 0;
 }
 
+static size_t bcm2835_spi_max_transfer_size(struct spi_device *spi)
+{
+       /*
+        * DMA transfers are limited to 16 bit (0 to 65535 bytes) by
+        * the SPI HW due to DLEN. Split up transfers (32-bit FIFO
+        * aligned) if the limit is exceeded.
+        */
+       if (spi->controller->can_dma)
+               return 65532;
+
+       return SIZE_MAX;
+}
+
 static int bcm2835_spi_setup(struct spi_device *spi)
 {
        struct spi_controller *ctlr = spi->controller;
@@ -1348,6 +1348,7 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
        ctlr->mode_bits = BCM2835_SPI_MODE_BITS;
        ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
        ctlr->num_chipselect = 3;
+       ctlr->max_transfer_size = bcm2835_spi_max_transfer_size;
        ctlr->setup = bcm2835_spi_setup;
        ctlr->cleanup = bcm2835_spi_cleanup;
        ctlr->transfer_one = bcm2835_spi_transfer_one;