arm64: dts: qcom: msm8996: Use generic QMP driver for UFS
authorBjorn Andersson <bjorn.andersson@linaro.org>
Sat, 25 Jan 2020 00:12:34 +0000 (16:12 -0800)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Fri, 6 Mar 2020 05:37:36 +0000 (21:37 -0800)
With support for the MSM8996 UFS PHY added to the common QMP driver,
migrate the DTS to use the common QMP binding.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200125001234.435384-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
arch/arm64/boot/dts/qcom/msm8996.dtsi

index fff6115f26706f4cf3f4b1dcfad6099a7643d41f..af87350b5547b9de6a56862b9035f35911b4fd49 100644 (file)
 
        vdda-phy-supply = <&vreg_l28a_0p925>;
        vdda-pll-supply = <&vreg_l12a_1p8>;
-
-       vdda-phy-max-microamp = <18380>;
-       vdda-pll-max-microamp = <9440>;
-
        vddp-ref-clk-supply = <&vreg_l25a_1p2>;
-       vddp-ref-clk-max-microamp = <100>;
-       vddp-ref-clk-always-on;
 };
 
 &ufshc {
index 7b800b1f631e4b52671fa2a4ef2c29dfc6b09625..14827adebd94a0a98f590e9d52d412def15f0aba 100644 (file)
                        reg = <0x00624000 0x2500>;
                        interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
 
-                       phys = <&ufsphy>;
+                       phys = <&ufsphy_lane>;
                        phy-names = "ufsphy";
 
                        power-domains = <&gcc UFS_GDSC>;
                };
 
                ufsphy: phy@627000 {
-                       compatible = "qcom,msm8996-ufs-phy-qmp-14nm";
-                       reg = <0x00627000 0xda8>;
-                       reg-names = "phy_mem";
-                       #phy-cells = <0>;
+                       compatible = "qcom,msm8996-qmp-ufs-phy";
+                       reg = <0x00627000 0x1c4>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+
+                       clocks = <&gcc GCC_UFS_CLKREF_CLK>;
+                       clock-names = "ref";
 
-                       clock-names = "ref_clk_src", "ref_clk";
-                       clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
-                                <&gcc GCC_UFS_CLKREF_CLK>;
                        resets = <&ufshc 0>;
+                       reset-names = "ufsphy";
                        status = "disabled";
+
+                       ufsphy_lane: lanes@627400 {
+                               reg = <0x627400 0x12c>,
+                                     <0x627600 0x200>,
+                                     <0x627c00 0x1b4>;
+                               #phy-cells = <0>;
+                       };
                };
 
                camss: camss@a00000 {