drm/lima: set gp bus_stop bit before hard reset

This is required for reliable hard resets. Otherwise, doing a hard reset
while a task is still running (such as a task which is being stopped by
the drm_sched timeout handler) may result in random mmu write timeouts
or lockups which cause the entire gpu to hang.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240124025947.2110659-5-nunes.erico@gmail.com

diff --git a/drivers/gpu/drm/lima/lima_gp.c b/drivers/gpu/drm/lima/lima_gp.c
index b9a06e701a33c025c0c51528fbb9e2a631420550..4355fa7b17f48d8c40a5eadbe55822a4c97ee909 100644 (file)
--- a/drivers/gpu/drm/lima/lima_gp.c
+++ b/drivers/gpu/drm/lima/lima_gp.c
@@ -166,6 +166,11 @@ static void lima_gp_task_run(struct lima_sched_pipe *pipe,
        gp_write(LIMA_GP_CMD, cmd);
 }
 
+static int lima_gp_bus_stop_poll(struct lima_ip *ip)
+{
+       return !!(gp_read(LIMA_GP_STATUS) & LIMA_GP_STATUS_BUS_STOPPED);
+}
+
 static int lima_gp_hard_reset_poll(struct lima_ip *ip)
 {
        gp_write(LIMA_GP_PERF_CNT_0_LIMIT, 0xC01A0000);
@@ -179,6 +184,13 @@ static int lima_gp_hard_reset(struct lima_ip *ip)
 
        gp_write(LIMA_GP_PERF_CNT_0_LIMIT, 0xC0FFE000);
        gp_write(LIMA_GP_INT_MASK, 0);
+
+       gp_write(LIMA_GP_CMD, LIMA_GP_CMD_STOP_BUS);
+       ret = lima_poll_timeout(ip, lima_gp_bus_stop_poll, 10, 100);
+       if (ret) {
+               dev_err(dev->dev, "%s bus stop timeout\n", lima_ip_name(ip));
+               return ret;
+       }
        gp_write(LIMA_GP_CMD, LIMA_GP_CMD_RESET);
        ret = lima_poll_timeout(ip, lima_gp_hard_reset_poll, 10, 100);
        if (ret) {