powerpc/64: Rename entry_64.S to prom_entry_64.S

This file contains only the enter_prom implementation now.
Trim includes and update header comment while we're here.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230606132447.315714-7-npiggin@gmail.com

diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index ec70a1748506480a9d033449eb984d0b1aed89fc..2919433be35574eb26e687b637c19e2529e88055 100644 (file)
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -165,9 +165,6 @@ endif
 
 obj64-$(CONFIG_PPC_TRANSACTIONAL_MEM)  += tm.o
 
-obj-$(CONFIG_PPC64)            += $(obj64-y)
-obj-$(CONFIG_PPC32)            += $(obj32-y)
-
 ifneq ($(CONFIG_XMON)$(CONFIG_KEXEC_CORE)(CONFIG_PPC_BOOK3S),)
 obj-y                          += ppc_save_regs.o
 endif
@@ -209,10 +206,13 @@ CFLAGS_paca.o                     += -fno-stack-protector
 
 obj-$(CONFIG_PPC_FPU)          += fpu.o
 obj-$(CONFIG_ALTIVEC)          += vector.o
-obj-$(CONFIG_PPC64)            += entry_64.o
-obj-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE)   += prom_init.o
 
-extra-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init_check
+obj-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init.o
+obj64-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_entry_64.o
+extra-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init_check
+
+obj-$(CONFIG_PPC64)            += $(obj64-y)
+obj-$(CONFIG_PPC32)            += $(obj32-y)
 
 quiet_cmd_prom_init_check = PROMCHK $@
       cmd_prom_init_check = $(CONFIG_SHELL) $< "$(NM)" $(obj)/prom_init.o; touch $@

diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
deleted file mode 100644 (file)
index f3d3885..0000000
--- a/arch/powerpc/kernel/entry_64.S
+++ /dev/null
@@ -1,111 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- *  PowerPC version 
- *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
- *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
- *  Adapted for Power Macintosh by Paul Mackerras.
- *  Low-level exception handlers and MMU support
- *  rewritten by Paul Mackerras.
- *    Copyright (C) 1996 Paul Mackerras.
- *  MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
- *
- *  This file contains the system call entry code, context switch
- *  code, and exception/interrupt return code for PowerPC.
- */
-
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <asm/cache.h>
-#include <asm/unistd.h>
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/mmu.h>
-#include <asm/thread_info.h>
-#include <asm/code-patching-asm.h>
-#include <asm/ppc_asm.h>
-#include <asm/asm-offsets.h>
-#include <asm/cputable.h>
-#include <asm/firmware.h>
-#include <asm/bug.h>
-#include <asm/ptrace.h>
-#include <asm/irqflags.h>
-#include <asm/hw_irq.h>
-#include <asm/context_tracking.h>
-#include <asm/ppc-opcode.h>
-#include <asm/barrier.h>
-#include <asm/export.h>
-#include <asm/asm-compat.h>
-#ifdef CONFIG_PPC_BOOK3S
-#include <asm/exception-64s.h>
-#else
-#include <asm/exception-64e.h>
-#endif
-#include <asm/feature-fixups.h>
-#include <asm/kup.h>
-
-       .section        ".text"
-
-_GLOBAL(enter_prom)
-       mflr    r0
-       std     r0,16(r1)
-        stdu   r1,-SWITCH_FRAME_SIZE(r1) /* Save SP and create stack space */
-
-       /* Because PROM is running in 32b mode, it clobbers the high order half
-        * of all registers that it saves.  We therefore save those registers
-        * PROM might touch to the stack.  (r0, r3-r13 are caller saved)
-        */
-       SAVE_GPR(2, r1)
-       SAVE_GPR(13, r1)
-       SAVE_NVGPRS(r1)
-       mfcr    r10
-       mfmsr   r11
-       std     r10,_CCR(r1)
-       std     r11,_MSR(r1)
-
-       /* Put PROM address in SRR0 */
-       mtsrr0  r4
-
-       /* Setup our trampoline return addr in LR */
-       bcl     20,31,$+4
-0:     mflr    r4
-       addi    r4,r4,(1f - 0b)
-               mtlr    r4
-
-       /* Prepare a 32-bit mode big endian MSR
-        */
-#ifdef CONFIG_PPC_BOOK3E_64
-       rlwinm  r11,r11,0,1,31
-       mtsrr1  r11
-       rfi
-#else /* CONFIG_PPC_BOOK3E_64 */
-       LOAD_REG_IMMEDIATE(r12, MSR_SF | MSR_LE)
-       andc    r11,r11,r12
-       mtsrr1  r11
-       RFI_TO_KERNEL
-#endif /* CONFIG_PPC_BOOK3E_64 */
-
-1:     /* Return from OF */
-       FIXUP_ENDIAN
-
-       /* Just make sure that r1 top 32 bits didn't get
-        * corrupt by OF
-        */
-       rldicl  r1,r1,0,32
-
-       /* Restore the MSR (back to 64 bits) */
-       ld      r0,_MSR(r1)
-       MTMSRD(r0)
-        isync
-
-       /* Restore other registers */
-       REST_GPR(2, r1)
-       REST_GPR(13, r1)
-       REST_NVGPRS(r1)
-       ld      r4,_CCR(r1)
-       mtcr    r4
-
-        addi   r1,r1,SWITCH_FRAME_SIZE
-       ld      r0,16(r1)
-       mtlr    r0
-        blr

diff --git a/arch/powerpc/kernel/prom_entry_64.S b/arch/powerpc/kernel/prom_entry_64.S
new file mode 100644 (file)
index 0000000..f1b8793
--- /dev/null
+++ b/arch/powerpc/kernel/prom_entry_64.S
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ *  PowerPC version 
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
+ *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
+ *  Adapted for Power Macintosh by Paul Mackerras.
+ *  Low-level exception handlers and MMU support
+ *  rewritten by Paul Mackerras.
+ *    Copyright (C) 1996 Paul Mackerras.
+ *  MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
+ *
+ *  This file contains the 64-bit prom entry code.
+ */
+#include <asm/asm-offsets.h>
+#ifdef CONFIG_PPC_BOOK3S
+#include <asm/exception-64s.h>
+#else
+#include <asm/exception-64e.h>
+#endif
+#include <asm/ppc_asm.h>
+
+.section ".text","ax",@progbits
+
+_GLOBAL(enter_prom)
+       mflr    r0
+       std     r0,16(r1)
+        stdu   r1,-SWITCH_FRAME_SIZE(r1) /* Save SP and create stack space */
+
+       /* Because PROM is running in 32b mode, it clobbers the high order half
+        * of all registers that it saves.  We therefore save those registers
+        * PROM might touch to the stack.  (r0, r3-r13 are caller saved)
+        */
+       SAVE_GPR(2, r1)
+       SAVE_GPR(13, r1)
+       SAVE_NVGPRS(r1)
+       mfcr    r10
+       mfmsr   r11
+       std     r10,_CCR(r1)
+       std     r11,_MSR(r1)
+
+       /* Put PROM address in SRR0 */
+       mtsrr0  r4
+
+       /* Setup our trampoline return addr in LR */
+       bcl     20,31,$+4
+0:     mflr    r4
+       addi    r4,r4,(1f - 0b)
+               mtlr    r4
+
+       /* Prepare a 32-bit mode big endian MSR
+        */
+#ifdef CONFIG_PPC_BOOK3E_64
+       rlwinm  r11,r11,0,1,31
+       mtsrr1  r11
+       rfi
+#else /* CONFIG_PPC_BOOK3E_64 */
+       LOAD_REG_IMMEDIATE(r12, MSR_SF | MSR_LE)
+       andc    r11,r11,r12
+       mtsrr1  r11
+       RFI_TO_KERNEL
+#endif /* CONFIG_PPC_BOOK3E_64 */
+
+1:     /* Return from OF */
+       FIXUP_ENDIAN
+
+       /* Just make sure that r1 top 32 bits didn't get
+        * corrupt by OF
+        */
+       rldicl  r1,r1,0,32
+
+       /* Restore the MSR (back to 64 bits) */
+       ld      r0,_MSR(r1)
+       MTMSRD(r0)
+        isync
+
+       /* Restore other registers */
+       REST_GPR(2, r1)
+       REST_GPR(13, r1)
+       REST_NVGPRS(r1)
+       ld      r4,_CCR(r1)
+       mtcr    r4
+
+        addi   r1,r1,SWITCH_FRAME_SIZE
+       ld      r0,16(r1)
+       mtlr    r0
+        blr

diff --git a/scripts/head-object-list.txt b/scripts/head-object-list.txt
index b2a0e21ea8d7ea70de239c62f45c7e8a63ef0671..26359968744ef1e9d5e40937e3ac4055d3a7bf2a 100644 (file)
--- a/scripts/head-object-list.txt
+++ b/scripts/head-object-list.txt
@@ -34,7 +34,7 @@ arch/powerpc/kernel/head_64.o
 arch/powerpc/kernel/head_8xx.o
 arch/powerpc/kernel/head_85xx.o
 arch/powerpc/kernel/head_book3s_32.o
-arch/powerpc/kernel/entry_64.o
+arch/powerpc/kernel/prom_entry_64.o
 arch/powerpc/kernel/fpu.o
 arch/powerpc/kernel/vector.o
 arch/powerpc/kernel/prom_init.o