drm/amd/display: fix dcn20 odm dpp programming
authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Tue, 6 Aug 2019 19:10:33 +0000 (15:10 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 23 Aug 2019 16:42:38 +0000 (11:42 -0500)
dcn20 requires special casing for odm.
This change treats odm as alternative to mpc tree on dcn20.

This is planned to be fixed in a future refactor

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

index b0ae9d2aad0ec50bd9aba136a64778ab839d6728..82c07d82e93790f92755cc6678cc74e3e0e59914 100644 (file)
@@ -2026,6 +2026,7 @@ static void commit_planes_for_stream(struct dc *dc,
                struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];
 
                if (!pipe_ctx->top_pipe &&
+                       !pipe_ctx->prev_odm_pipe &&
                        pipe_ctx->stream &&
                        pipe_ctx->stream == stream) {
                        struct dc_stream_status *stream_status = NULL;
index e7302587b7868ffdb00588de9bc567e6292b620a..0fb0a356323b4cdf188b4f7d689a05c2ccbce2d8 100644 (file)
@@ -1054,8 +1054,13 @@ static void dcn20_program_all_pipe_in_tree(
        if (pipe_ctx->plane_state != NULL)
                dcn20_program_pipe(dc, pipe_ctx, context);
 
-       if (pipe_ctx->bottom_pipe != NULL && pipe_ctx->bottom_pipe != pipe_ctx)
+       if (pipe_ctx->bottom_pipe != NULL) {
+               ASSERT(pipe_ctx->bottom_pipe != pipe_ctx);
                dcn20_program_all_pipe_in_tree(dc, pipe_ctx->bottom_pipe, context);
+       } else if (pipe_ctx->next_odm_pipe != NULL) {
+               ASSERT(pipe_ctx->next_odm_pipe != pipe_ctx);
+               dcn20_program_all_pipe_in_tree(dc, pipe_ctx->next_odm_pipe, context);
+       }
 }
 
 void dcn20_pipe_control_lock_global(