tile->mem.vram.usable_size = vram_size;
tile->mem.vram.mapping = xe->mem.vram.mapping + tile_offset;
- drm_info(&xe->drm, "VRAM[%u, %u]: %pa, %pa\n", id, tile->id,
- &tile->mem.vram.io_start, &tile->mem.vram.usable_size);
-
if (tile->mem.vram.io_size < tile->mem.vram.usable_size)
- drm_info(&xe->drm, "VRAM[%u, %u]: CPU access limited to %pa\n", id,
- tile->id, &tile->mem.vram.io_size);
+ drm_info(&xe->drm, "Small BAR device\n");
+ drm_info(&xe->drm, "VRAM[%u, %u]: Actual physical size %pa, usable size exclude stolen %pa, CPU accessible size %pa\n", id,
+ tile->id, &tile->mem.vram.actual_physical_size, &tile->mem.vram.usable_size, &tile->mem.vram.io_size);
+ drm_info(&xe->drm, "VRAM[%u, %u]: DPA range: [%pa-%llx], io range: [%pa-%llx]\n", id, tile->id,
+ &tile->mem.vram.dpa_base, tile->mem.vram.dpa_base + tile->mem.vram.actual_physical_size,
+ &tile->mem.vram.io_start, tile->mem.vram.io_start + tile->mem.vram.io_size);
/* calculate total size using tile size to get the correct HW sizing */
total_size += tile_size;