arm64: dts: rockchip: add wolfvision pf5 io expander board

Add device tree overlay for the WolfVision PF5 IO Expander board. This
extension board can be attached to the WolfVision PF5 mainboard and
features
 - TI DP83826 Ethernet PHY
 - RJ45 jack
 - USB-A host port

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20240325-feature-wolfvision-pf5-v1-4-5725445f792a@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 8fb35a363e4f9d637562b5179ff40d6399b12684..0192980ef37f1170ed02b49b6fcd2e36537fbdf1 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-coolpi-cm5-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-wifi.dtbo

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso
new file mode 100644 (file)
index 0000000..ebcaeaf
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso
@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Device tree overlay for the WolfVision PF5 IO Expander board.
+ *
+ * Copyright (C) 2024 WolfVision GmbH.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/rk3568-cru.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+&{/} {
+       gmac0_clkin: external-gmac0-clock {
+               compatible = "fixed-clock";
+               clock-frequency = <50000000>;
+               clock-output-names = "gmac0_clkin";
+               #clock-cells = <0>;
+       };
+
+       usb_host_vbus: usb-host-vbus-regulator {
+               compatible = "regulator-fixed";
+               enable-active-high;
+               gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&usb_host_vbus_en>;
+               regulator-name = "usb_host_vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               vin-supply = <&vcc5v_in>;
+       };
+
+       vcc1v8_eth: vcc1v8-eth-regulator {
+               compatible = "regulator-fixed";
+               enable-active-high;
+               gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&vcc1v8_eth_en>;
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-name = "1v8_eth";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               vin-supply = <&vcc3v3_sys>;
+       };
+
+       vcc3v3_eth: vcc3v3-eth-regulator {
+               compatible = "regulator-fixed";
+               enable-active-low;
+               gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&vcc3v3_eth_enn>;
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-name = "3v3_eth";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               vin-supply = <&vcc3v3_sys>;
+       };
+};
+
+&gmac0 {
+       assigned-clocks = <&cru SCLK_GMAC0_RX_TX>,
+                         <&cru SCLK_GMAC0>;
+       assigned-clock-parents = <&cru SCLK_GMAC0_RMII_SPEED>,
+                                <&gmac0_clkin>;
+       clock_in_out = "input";
+       phy-handle = <&dp83826>;
+       phy-mode = "rmii";
+       phy-supply = <&vcc3v3_eth>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&gmac0_miim
+                    &gmac0_clkinout
+                    &gmac0_rx_er
+                    &gmac0_rx_bus2
+                    &gmac0_tx_bus2>;
+       status = "okay";
+};
+
+&mdio0 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       dp83826: ethernet-phy@0 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <0x0>;
+               interrupt-parent = <&gpio0>;
+               interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&eth_wake_intn &eth_phy_rstn>;
+               reset-assert-us = <1000>;
+               reset-deassert-us = <2000>;
+               reset-gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
+               wakeup-source;
+       };
+};
+
+&pinctrl {
+       ethernet {
+               eth_wake_intn: eth-wake-intn-pinctrl {
+                       rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               eth_phy_rstn: eth-phy-rstn-pinctrl {
+                       rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               vcc1v8_eth_en: vcc1v8-eth-en-pinctrl {
+                       rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               vcc3v3_eth_enn: vcc3v3-eth-enn-pinctrl {
+                       rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
+       usb {
+               usb_host_vbus_en: usb-host-vbus-en-pinctrl {
+                       rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+};
+
+&usb_host1_xhci {
+       maximum-speed = "high-speed";
+       phys = <&usb2phy0_host>;
+       phy-names = "usb2-phy";
+       status = "okay";
+};
+
+&usb2phy0_host {
+       phy-supply = <&usb_host_vbus>;
+       status = "okay";
+};