thermal/drivers/mediatek/lvts_thermal: Add mt8192 support

Add LVTS Driver support for MT8192.

Co-developed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
[bero@baylibre.com: cosmetic changes, rebase]
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20231017190545.157282-4-bero@baylibre.com

diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
index 4ac6ae37a1ee397d43fa1044d6aa58f4a870479a..0fc8899a8fcbbb3452ef5b622b6a196cf9f4e1a2 100644 (file)
--- a/drivers/thermal/mediatek/lvts_thermal.c
+++ b/drivers/thermal/mediatek/lvts_thermal.c
@@ -92,6 +92,7 @@
 #define LVTS_MSR_READ_WAIT_US          (LVTS_MSR_READ_TIMEOUT_US / 2)
 
 #define LVTS_HW_SHUTDOWN_MT7988                105000
+#define LVTS_HW_SHUTDOWN_MT8192                105000
 #define LVTS_HW_SHUTDOWN_MT8195                105000
 
 #define LVTS_MINIMUM_THRESHOLD         20000
@@ -1329,6 +1330,88 @@ static int lvts_resume(struct device *dev)
        return 0;
 }
 
+static const struct lvts_ctrl_data mt8192_lvts_mcu_data_ctrl[] = {
+       {
+               .cal_offset = { 0x04, 0x08 },
+               .lvts_sensor = {
+                       { .dt_id = MT8192_MCU_BIG_CPU0 },
+                       { .dt_id = MT8192_MCU_BIG_CPU1 }
+               },
+               .num_lvts_sensor = 2,
+               .offset = 0x0,
+               .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
+               .mode = LVTS_MSR_FILTERED_MODE,
+       },
+       {
+               .cal_offset = { 0x0c, 0x10 },
+               .lvts_sensor = {
+                       { .dt_id = MT8192_MCU_BIG_CPU2 },
+                       { .dt_id = MT8192_MCU_BIG_CPU3 }
+               },
+               .num_lvts_sensor = 2,
+               .offset = 0x100,
+               .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
+               .mode = LVTS_MSR_FILTERED_MODE,
+       },
+       {
+               .cal_offset = { 0x14, 0x18, 0x1c, 0x20 },
+               .lvts_sensor = {
+                       { .dt_id = MT8192_MCU_LITTLE_CPU0 },
+                       { .dt_id = MT8192_MCU_LITTLE_CPU1 },
+                       { .dt_id = MT8192_MCU_LITTLE_CPU2 },
+                       { .dt_id = MT8192_MCU_LITTLE_CPU3 }
+               },
+               .num_lvts_sensor = 4,
+               .offset = 0x200,
+               .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
+               .mode = LVTS_MSR_FILTERED_MODE,
+       }
+};
+
+static const struct lvts_ctrl_data mt8192_lvts_ap_data_ctrl[] = {
+               {
+               .cal_offset = { 0x24, 0x28 },
+               .lvts_sensor = {
+                       { .dt_id = MT8192_AP_VPU0 },
+                       { .dt_id = MT8192_AP_VPU1 }
+               },
+               .num_lvts_sensor = 2,
+               .offset = 0x0,
+               .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
+       },
+       {
+               .cal_offset = { 0x2c, 0x30 },
+               .lvts_sensor = {
+                       { .dt_id = MT8192_AP_GPU0 },
+                       { .dt_id = MT8192_AP_GPU1 }
+               },
+               .num_lvts_sensor = 2,
+               .offset = 0x100,
+               .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
+       },
+       {
+               .cal_offset = { 0x34, 0x38 },
+               .lvts_sensor = {
+                       { .dt_id = MT8192_AP_INFRA },
+                       { .dt_id = MT8192_AP_CAM },
+               },
+               .num_lvts_sensor = 2,
+               .offset = 0x200,
+               .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
+       },
+       {
+               .cal_offset = { 0x3c, 0x40, 0x44 },
+               .lvts_sensor = {
+                       { .dt_id = MT8192_AP_MD0 },
+                       { .dt_id = MT8192_AP_MD1 },
+                       { .dt_id = MT8192_AP_MD2 }
+               },
+               .num_lvts_sensor = 3,
+               .offset = 0x300,
+               .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
+       }
+};
+
 static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
        {
                .cal_offset = { 0x04, 0x07 },
@@ -1415,6 +1498,16 @@ static const struct lvts_data mt7988_lvts_ap_data = {
        .temp_offset    = LVTS_COEFF_B_MT7988,
 };
 
+static const struct lvts_data mt8192_lvts_mcu_data = {
+       .lvts_ctrl      = mt8192_lvts_mcu_data_ctrl,
+       .num_lvts_ctrl  = ARRAY_SIZE(mt8192_lvts_mcu_data_ctrl),
+};
+
+static const struct lvts_data mt8192_lvts_ap_data = {
+       .lvts_ctrl      = mt8192_lvts_ap_data_ctrl,
+       .num_lvts_ctrl  = ARRAY_SIZE(mt8192_lvts_ap_data_ctrl),
+};
+
 static const struct lvts_data mt8195_lvts_mcu_data = {
        .lvts_ctrl      = mt8195_lvts_mcu_data_ctrl,
        .num_lvts_ctrl  = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
@@ -1431,6 +1524,8 @@ static const struct lvts_data mt8195_lvts_ap_data = {
 
 static const struct of_device_id lvts_of_match[] = {
        { .compatible = "mediatek,mt7988-lvts-ap", .data = &mt7988_lvts_ap_data },
+       { .compatible = "mediatek,mt8192-lvts-mcu", .data = &mt8192_lvts_mcu_data },
+       { .compatible = "mediatek,mt8192-lvts-ap", .data = &mt8192_lvts_ap_data },
        { .compatible = "mediatek,mt8195-lvts-mcu", .data = &mt8195_lvts_mcu_data },
        { .compatible = "mediatek,mt8195-lvts-ap", .data = &mt8195_lvts_ap_data },
        {},