PWM6_B_MARK,
 };
 
+/* - SATA --------------------------------------------------------------------*/
+static const unsigned int sata0_devslp_a_pins[] = {
+       /* DEVSLP */
+       RCAR_GP_PIN(6, 16),
+};
+static const unsigned int sata0_devslp_a_mux[] = {
+       SATA_DEVSLP_A_MARK,
+};
+static const unsigned int sata0_devslp_b_pins[] = {
+       /* DEVSLP */
+       RCAR_GP_PIN(4, 6),
+};
+static const unsigned int sata0_devslp_b_mux[] = {
+       SATA_DEVSLP_B_MARK,
+};
+
 /* - SCIF0 ------------------------------------------------------------------ */
 static const unsigned int scif0_data_pins[] = {
        /* RX, TX */
        SH_PFC_PIN_GROUP(pwm5_b),
        SH_PFC_PIN_GROUP(pwm6_a),
        SH_PFC_PIN_GROUP(pwm6_b),
+       SH_PFC_PIN_GROUP(sata0_devslp_a),
+       SH_PFC_PIN_GROUP(sata0_devslp_b),
        SH_PFC_PIN_GROUP(scif0_data),
        SH_PFC_PIN_GROUP(scif0_clk),
        SH_PFC_PIN_GROUP(scif0_ctrl),
        "pwm6_b",
 };
 
+static const char * const sata0_groups[] = {
+       "sata0_devslp_a",
+       "sata0_devslp_b",
+};
+
 static const char * const scif0_groups[] = {
        "scif0_data",
        "scif0_clk",
        SH_PFC_FUNCTION(pwm4),
        SH_PFC_FUNCTION(pwm5),
        SH_PFC_FUNCTION(pwm6),
+       SH_PFC_FUNCTION(sata0),
        SH_PFC_FUNCTION(scif0),
        SH_PFC_FUNCTION(scif1),
        SH_PFC_FUNCTION(scif2),