x86/CPU/AMD: Improve the erratum 1386 workaround
authorBorislav Petkov (AMD) <bp@alien8.de>
Sun, 24 Mar 2024 19:51:35 +0000 (20:51 +0100)
committerBorislav Petkov (AMD) <bp@alien8.de>
Mon, 25 Mar 2024 13:05:24 +0000 (14:05 +0100)
Disable XSAVES only on machines which haven't loaded the microcode
revision containing the erratum fix.

This will come in handy when running archaic OSes as guests. OSes whose
brilliant programmers thought that CPUID is overrated and one should not
query it but use features directly, ala shoot first, ask questions
later... but only if you're alive after the shooting.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Tested-by: "Maciej S. Szmigiero" <maciej.szmigiero@oracle.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Link: https://lore.kernel.org/r/20240324200525.GBZgCHhYFsBj12PrKv@fat_crate.local
arch/x86/include/asm/cpu_device_id.h
arch/x86/kernel/cpu/amd.c

index eb8fcede9e3bf4365e3d5347b5ff27783b4a7c11..bf4e065cf1e2fc0f2a05bdf56e8d282a2ef57d86 100644 (file)
@@ -190,6 +190,14 @@ struct x86_cpu_desc {
        .x86_microcode_rev      = (revision),                   \
 }
 
+#define AMD_CPU_DESC(fam, model, stepping, revision) {         \
+       .x86_family             = (fam),                        \
+       .x86_vendor             = X86_VENDOR_AMD,               \
+       .x86_model              = (model),                      \
+       .x86_stepping           = (stepping),                   \
+       .x86_microcode_rev      = (revision),                   \
+}
+
 extern const struct x86_cpu_id *x86_match_cpu(const struct x86_cpu_id *match);
 extern bool x86_cpu_has_min_microcode_rev(const struct x86_cpu_desc *table);
 
index 6d8677e80ddbb17c94ec7fcda9e5bae502c0dcb2..873f0fdc2ef8a48274ff97cadc0d662a2d0e3cad 100644 (file)
@@ -13,6 +13,7 @@
 #include <asm/apic.h>
 #include <asm/cacheinfo.h>
 #include <asm/cpu.h>
+#include <asm/cpu_device_id.h>
 #include <asm/spec-ctrl.h>
 #include <asm/smp.h>
 #include <asm/numa.h>
@@ -802,6 +803,11 @@ static void init_amd_bd(struct cpuinfo_x86 *c)
        clear_rdrand_cpuid_bit(c);
 }
 
+static const struct x86_cpu_desc erratum_1386_microcode[] = {
+       AMD_CPU_DESC(0x17,  0x1, 0x2, 0x0800126e),
+       AMD_CPU_DESC(0x17, 0x31, 0x0, 0x08301052),
+};
+
 static void fix_erratum_1386(struct cpuinfo_x86 *c)
 {
        /*
@@ -811,7 +817,13 @@ static void fix_erratum_1386(struct cpuinfo_x86 *c)
         *
         * Affected parts all have no supervisor XSAVE states, meaning that
         * the XSAVEC instruction (which works fine) is equivalent.
+        *
+        * Clear the feature flag only on microcode revisions which
+        * don't have the fix.
         */
+       if (x86_cpu_has_min_microcode_rev(erratum_1386_microcode))
+               return;
+
        clear_cpu_cap(c, X86_FEATURE_XSAVES);
 }