drm/xe/display: mark DPT with XE_BO_PAGETABLE
authorMatthew Auld <matthew.auld@intel.com>
Thu, 14 Mar 2024 16:49:06 +0000 (16:49 +0000)
committerMatthew Auld <matthew.auld@intel.com>
Tue, 19 Mar 2024 09:08:40 +0000 (09:08 +0000)
Otherwise in the case where we use normal system memory, the CPU access
will always be cached, like when filling the DPT PTEs, which is likely
not what we want since HW access could be incoherent on platforms like
LNL. Marking as XE_BO_PAGETABLE will force wc/uc underneath on such
platforms.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240314164905.239449-2-matthew.auld@intel.com
drivers/gpu/drm/xe/display/xe_fb_pin.c

index 722c84a5660736100d52ed6d5dd16245efbe8b50..b220f136be7035267a5e870e9a414b53e8d80ba8 100644 (file)
@@ -100,17 +100,20 @@ static int __xe_pin_fb_vma_dpt(struct intel_framebuffer *fb,
                dpt = xe_bo_create_pin_map(xe, tile0, NULL, dpt_size,
                                           ttm_bo_type_kernel,
                                           XE_BO_CREATE_VRAM0_BIT |
-                                          XE_BO_CREATE_GGTT_BIT);
+                                          XE_BO_CREATE_GGTT_BIT |
+                                          XE_BO_PAGETABLE);
        else
                dpt = xe_bo_create_pin_map(xe, tile0, NULL, dpt_size,
                                           ttm_bo_type_kernel,
                                           XE_BO_CREATE_STOLEN_BIT |
-                                          XE_BO_CREATE_GGTT_BIT);
+                                          XE_BO_CREATE_GGTT_BIT |
+                                          XE_BO_PAGETABLE);
        if (IS_ERR(dpt))
                dpt = xe_bo_create_pin_map(xe, tile0, NULL, dpt_size,
                                           ttm_bo_type_kernel,
                                           XE_BO_CREATE_SYSTEM_BIT |
-                                          XE_BO_CREATE_GGTT_BIT);
+                                          XE_BO_CREATE_GGTT_BIT |
+                                          XE_BO_PAGETABLE);
        if (IS_ERR(dpt))
                return PTR_ERR(dpt);