drm/amdgpu: assign the doorbell index for sdma on non-AID0
authorLe Ma <le.ma@amd.com>
Tue, 1 Mar 2022 11:42:29 +0000 (19:42 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Jun 2023 13:43:41 +0000 (09:43 -0400)
Allocate new sdma doorbell index for the instances only on AID1 for now.

Todo: there's limitation that SDMA doorbell index on SDMA 4.4.2 needs to be
less than 0x1FF, so the tail part in _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT is not
enough to store sdma doorbell range on maximum 4 AIDs if doorbell_range is 20.
So it looks better to create a new doorbell index assignment table for 4.4.2.

v2: change "(x << 1) + 2" to "(x + 1) << 1" for readability.

Signed-off-by: Le Ma <le.ma@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

index ffb75d23d2fc6c385e3933a24e91563adcba9306..b036d2f019300965261751af1c75e6aabd95b446 100644 (file)
@@ -85,6 +85,7 @@ struct amdgpu_doorbell_index {
        uint32_t last_non_cp;
        uint32_t xcc1_kiq_start;
        uint32_t xcc1_mec_ring0_start;
+       uint32_t aid1_sdma_start;
        uint32_t max_assignment;
        /* Per engine SDMA doorbell size in dword */
        uint32_t sdma_doorbell_range;
@@ -171,7 +172,10 @@ typedef enum _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT
        /* 8 compute rings per GC. Max to 0x1CE */
        AMDGPU_VEGA20_DOORBELL_XCC1_MEC_RING0_START       = 0x197,
 
-       AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT            = 0x1CE,
+       /* AID1 SDMA: 0x1D0 ~ 0x1F7 */
+       AMDGPU_VEGA20_DOORBELL_AID1_sDMA_START           = 0x1D0,
+
+       AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT            = 0x1F7,
        AMDGPU_VEGA20_DOORBELL_INVALID                   = 0xFFFF
 } AMDGPU_VEGA20_DOORBELL_ASSIGNMENT;
 
index 7deadea03caa5b3e50b00596dd1ff33f41476761..6935a24d1e89f547edf6717e6e7a1cd057a95ac5 100644 (file)
@@ -1310,7 +1310,14 @@ static int sdma_v4_4_2_sw_init(void *handle)
                                ring->use_doorbell?"true":"false");
 
                /* doorbell size is 2 dwords, get DWORD offset */
-               ring->doorbell_index = adev->doorbell_index.sdma_engine[i] << 1;
+               if (aid_id > 0)
+                       ring->doorbell_index =
+                               (adev->doorbell_index.aid1_sdma_start << 1)
+                               + adev->doorbell_index.sdma_doorbell_range
+                               * (i - adev->sdma.num_inst_per_aid);
+               else
+                       ring->doorbell_index =
+                               adev->doorbell_index.sdma_engine[i] << 1;
                ring->vm_hub = AMDGPU_MMHUB0(aid_id);
 
                sprintf(ring->name, "sdma%d.%d", aid_id,
@@ -1329,7 +1336,14 @@ static int sdma_v4_4_2_sw_init(void *handle)
                        /* doorbell index of page queue is assigned right after
                         * gfx queue on the same instance
                         */
-                       ring->doorbell_index = (adev->doorbell_index.sdma_engine[i] + 1) << 1;
+                       if (aid_id > 0)
+                               ring->doorbell_index =
+                                       ((adev->doorbell_index.aid1_sdma_start + 1) << 1)
+                                       + adev->doorbell_index.sdma_doorbell_range
+                                       * (i - adev->sdma.num_inst_per_aid);
+                       else
+                               ring->doorbell_index =
+                                       (adev->doorbell_index.sdma_engine[i] + 1) << 1;
                        ring->vm_hub = AMDGPU_MMHUB0(aid_id);
 
                        sprintf(ring->name, "page%d.%d", aid_id,