drm/xe: xe_engine_create_ioctl should check gt_count, not tile_count
authorMatt Roper <matthew.d.roper@intel.com>
Tue, 25 Jul 2023 00:34:35 +0000 (17:34 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 21 Dec 2023 16:37:54 +0000 (11:37 -0500)
Platforms like MTL only have a single tile, but multiple GTs.
Ensure XE_ENGINE_CREATE accepts engine creation on gt1 on such
platforms.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230725003433.1992137-4-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/xe_engine.c

index c31e55c10a33e3afd73324db7d5a1707d594999c..71f77878522675d2b01d79f1306ca30c1228e412 100644 (file)
@@ -416,7 +416,7 @@ find_hw_engine(struct xe_device *xe,
        if (eci.engine_class > ARRAY_SIZE(user_to_xe_engine_class))
                return NULL;
 
-       if (eci.gt_id >= xe->info.tile_count)
+       if (eci.gt_id >= xe->info.gt_count)
                return NULL;
 
        idx = array_index_nospec(eci.engine_class,
@@ -539,7 +539,7 @@ int xe_engine_create_ioctl(struct drm_device *dev, void *data,
        if (XE_IOCTL_DBG(xe, err))
                return -EFAULT;
 
-       if (XE_IOCTL_DBG(xe, eci[0].gt_id >= xe->info.tile_count))
+       if (XE_IOCTL_DBG(xe, eci[0].gt_id >= xe->info.gt_count))
                return -EINVAL;
 
        if (eci[0].engine_class == DRM_XE_ENGINE_CLASS_VM_BIND) {