arm64: dts: msm8996: Add proper capacity scaling for the cpus

msm8996 features 4 cpus - 2 in each cluster. However, all cpus implement
the same microarchitecture and the two clusters only differ in the
maximum frequency attainable by the CPUs.

Add capacity-dmips-mhz property to allow the topology code to determine
the actual capacity by taking into account the highest frequency for
each CPU.

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 778c7f0a2429263f34bc5f0ee2abf8671c2f0846..b7cf2a17dcb59c0e4793ce2f47625c559ec23873 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -103,6 +103,7 @@
                        reg = <0x0 0x0>;
                        enable-method = "psci";
                        cpu-idle-states = <&CPU_SLEEP_0>;
+                       capacity-dmips-mhz = <1024>;
                        next-level-cache = <&L2_0>;
                        L2_0: l2-cache {
                              compatible = "cache";
@@ -116,6 +117,7 @@
                        reg = <0x0 0x1>;
                        enable-method = "psci";
                        cpu-idle-states = <&CPU_SLEEP_0>;
+                       capacity-dmips-mhz = <1024>;
                        next-level-cache = <&L2_0>;
                };
 
@@ -125,6 +127,7 @@
                        reg = <0x0 0x100>;
                        enable-method = "psci";
                        cpu-idle-states = <&CPU_SLEEP_0>;
+                       capacity-dmips-mhz = <1024>;
                        next-level-cache = <&L2_1>;
                        L2_1: l2-cache {
                              compatible = "cache";
@@ -138,6 +141,7 @@
                        reg = <0x0 0x101>;
                        enable-method = "psci";
                        cpu-idle-states = <&CPU_SLEEP_0>;
+                       capacity-dmips-mhz = <1024>;
                        next-level-cache = <&L2_1>;
                };