ARM: dts: imx6qdl-gw5904: add internal mdio nodes

Complete the switch definition by adding the internal mdio nodes.

This does not change behavior on Linux but is required if the dt is used
for U-Boot which requires the internal PHY ports to be defined for
DSA.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi
index 9594bc5745ed6f5dc9db215bc805e89594e15d55..3375b3fd8d4ccb0a77b20700f12eb71257cbc5c7 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi
@@ -212,6 +212,27 @@
                        compatible = "marvell,mv88e6085";
                        reg = <0>;
 
+                       mdio {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               sw_phy0: ethernet-phy@0 {
+                                       reg = <0x0>;
+                               };
+
+                               sw_phy1: ethernet-phy@1 {
+                                       reg = <0x1>;
+                               };
+
+                               sw_phy2: ethernet-phy@2 {
+                                       reg = <0x2>;
+                               };
+
+                               sw_phy3: ethernet-phy@3 {
+                                       reg = <0x3>;
+                               };
+                       };
+
                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;
@@ -219,21 +240,29 @@
                                port@0 {
                                        reg = <0>;
                                        label = "lan4";
+                                       phy-handle = <&sw_phy0>;
+                                       phy-mode = "internal";
                                };
 
                                port@1 {
                                        reg = <1>;
                                        label = "lan3";
+                                       phy-handle = <&sw_phy1>;
+                                       phy-mode = "internal";
                                };
 
                                port@2 {
                                        reg = <2>;
                                        label = "lan2";
+                                       phy-handle = <&sw_phy2>;
+                                       phy-mode = "internal";
                                };
 
                                port@3 {
                                        reg = <3>;
                                        label = "lan1";
+                                       phy-handle = <&sw_phy3>;
+                                       phy-mode = "internal";
                                };
 
                                port@5 {