ARM: dts: BCM63xx: enable SATA PHY and AHCI controller

Add Device Tree entries for the Broadcom AHCI and SATA PHY controller
found on BCM63138 SoCs

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi
index 6df61518776f7e45ef8a290fd1920ab675ca649c..f59764008b9c6ed3f2d53755fb292ef8d26dcc33 100644 (file)
--- a/arch/arm/boot/dts/bcm63138.dtsi
+++ b/arch/arm/boot/dts/bcm63138.dtsi
@@ -143,6 +143,37 @@
                        reg = <0x4800e0 0x10>;
                        #reset-cells = <2>;
                };
+
+               ahci: sata@8000 {
+                       compatible = "brcm,bcm63138-ahci", "brcm,sata3-ahci";
+                       reg-names = "ahci", "top-ctrl";
+                       reg = <0xa000 0x9ac>, <0x8040 0x24>;
+                       interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       resets = <&pmb0 3 1>;
+                       reset-names = "ahci";
+                       status = "disabled";
+
+                       sata0: sata-port@0 {
+                               reg = <0>;
+                               phys = <&sata_phy0>;
+                       };
+               };
+
+               sata_phy: sata-phy@8100 {
+                       compatible = "brcm,bcm63138-sata-phy", "brcm,phy-sata3";
+                       reg = <0x8100 0x1e00>;
+                       reg-names = "phy";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       sata_phy0: sata-phy@0 {
+                               reg = <0>;
+                               #phy-cells = <0>;
+                       };
+               };
        };
 
        /* Legacy UBUS base */