ice: Fix interrupt moderation settings getting cleared
authorMichal Wilczynski <michal.wilczynski@intel.com>
Sun, 8 May 2022 23:33:48 +0000 (19:33 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 25 May 2022 07:57:32 +0000 (09:57 +0200)
[ Upstream commit bf13502ed5f941b0777b3fd1e24dac5d93f3886c ]

Adaptive-rx and Adaptive-tx are interrupt moderation settings
that can be enabled/disabled using ethtool:
ethtool -C ethX adaptive-rx on/off adaptive-tx on/off

Unfortunately those settings are getting cleared after
changing number of queues, or in ethtool world 'channels':
ethtool -L ethX rx 1 tx 1

Clearing was happening due to introduction of bit fields
in ice_ring_container struct. This way only itr_setting
bits were rebuilt during ice_vsi_rebuild_set_coalesce().

Introduce an anonymous struct of bitfields and create a
union to refer to them as a single variable.
This way variable can be easily saved and restored.

Fixes: 61dc79ced7aa ("ice: Restore interrupt throttle settings after VSI rebuild")
Signed-off-by: Michal Wilczynski <michal.wilczynski@intel.com>
Tested-by: Gurucharan <gurucharanx.g@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/ethernet/intel/ice/ice_lib.c
drivers/net/ethernet/intel/ice/ice_txrx.h

index 653996e8fd30994334119ef048e5826266fad2e4..4417238b0e64fd51fb8b62b056d527f004b625f9 100644 (file)
@@ -2980,8 +2980,8 @@ ice_vsi_rebuild_get_coalesce(struct ice_vsi *vsi,
        ice_for_each_q_vector(vsi, i) {
                struct ice_q_vector *q_vector = vsi->q_vectors[i];
 
-               coalesce[i].itr_tx = q_vector->tx.itr_setting;
-               coalesce[i].itr_rx = q_vector->rx.itr_setting;
+               coalesce[i].itr_tx = q_vector->tx.itr_settings;
+               coalesce[i].itr_rx = q_vector->rx.itr_settings;
                coalesce[i].intrl = q_vector->intrl;
 
                if (i < vsi->num_txq)
@@ -3037,21 +3037,21 @@ ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi,
                 */
                if (i < vsi->alloc_rxq && coalesce[i].rx_valid) {
                        rc = &vsi->q_vectors[i]->rx;
-                       rc->itr_setting = coalesce[i].itr_rx;
+                       rc->itr_settings = coalesce[i].itr_rx;
                        ice_write_itr(rc, rc->itr_setting);
                } else if (i < vsi->alloc_rxq) {
                        rc = &vsi->q_vectors[i]->rx;
-                       rc->itr_setting = coalesce[0].itr_rx;
+                       rc->itr_settings = coalesce[0].itr_rx;
                        ice_write_itr(rc, rc->itr_setting);
                }
 
                if (i < vsi->alloc_txq && coalesce[i].tx_valid) {
                        rc = &vsi->q_vectors[i]->tx;
-                       rc->itr_setting = coalesce[i].itr_tx;
+                       rc->itr_settings = coalesce[i].itr_tx;
                        ice_write_itr(rc, rc->itr_setting);
                } else if (i < vsi->alloc_txq) {
                        rc = &vsi->q_vectors[i]->tx;
-                       rc->itr_setting = coalesce[0].itr_tx;
+                       rc->itr_settings = coalesce[0].itr_tx;
                        ice_write_itr(rc, rc->itr_setting);
                }
 
@@ -3065,12 +3065,12 @@ ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi,
        for (; i < vsi->num_q_vectors; i++) {
                /* transmit */
                rc = &vsi->q_vectors[i]->tx;
-               rc->itr_setting = coalesce[0].itr_tx;
+               rc->itr_settings = coalesce[0].itr_tx;
                ice_write_itr(rc, rc->itr_setting);
 
                /* receive */
                rc = &vsi->q_vectors[i]->rx;
-               rc->itr_setting = coalesce[0].itr_rx;
+               rc->itr_settings = coalesce[0].itr_rx;
                ice_write_itr(rc, rc->itr_setting);
 
                vsi->q_vectors[i]->intrl = coalesce[0].intrl;
index 69f78a1c234f9f49f435f936419443d6623ef569..4adc3dff04ba7672fe42334289f184d38e1b6a17 100644 (file)
@@ -345,9 +345,14 @@ struct ice_ring_container {
        /* this matches the maximum number of ITR bits, but in usec
         * values, so it is shifted left one bit (bit zero is ignored)
         */
-       u16 itr_setting:13;
-       u16 itr_reserved:2;
-       u16 itr_mode:1;
+       union {
+               struct {
+                       u16 itr_setting:13;
+                       u16 itr_reserved:2;
+                       u16 itr_mode:1;
+               };
+               u16 itr_settings;
+       };
        enum ice_container_type type;
 };